Senior Interconnect Architect (TileLink, Chisel)
$158.76k - $194.04kSiFive
A leading semiconductor company in Austin, Texas is seeking a Staff Hardware Engineer to design innovative CPU and interconnect IPs for RISC-V architecture. Ideal candidates have strong backgrounds in hardware design and software engineering. Responsibilities include architecting and implementing TileLink interconnects and enhancing cache controllers. The role offers a competitive salary range of $158,760 to $194,040, along with comprehensive benefits. #J-18808-Ljbffr
Vacancy posted 1 day ago
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