Staff Design Verification Engineer - Coherent Interconnect
SiFive, Inc.
SiFive, Inc. is seeking a Staff Design Verification Engineer to manage verification for a next-generation cache-coherent interconnect subsystem. This role involves planning and executing verification for high-performance SoCs and collaborating with diverse teams to ensure quality. The ideal candidate will have a strong background in ASIC design verification, with proficiency in SystemVerilog and a deep understanding of cache-coherent systems. SiFive offers a competitive salary and benefits package, fostering innovation and collaboration. #J-18808-Ljbffr SiFive, Inc.
Vacancy posted 1 day ago
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