Quantum Computing Research Scientist - Quantum Error Correction - Senior Associate

As a Senior Associate quantum computing researcher within the Global Technology Applied Research (GTAR) center at JPMorgan Chase, you will develop, investigate, and optimize protocols for universal fault‑tolerant quantum computation, implement these protocols for experimental validation, and use them to execute quantum algorithms fault‑tolerantly on quantum computing hardware. Job responsibilities Develop circuit gadgets and protocols for universal fault‑tolerant quantum computation (FTQC) Numerically investigate and optimize fault‑tolerant gadgets for real‑world execution on quantum computing hardware Implement and experimentally validate protocols for universal FTQC on quantum computing hardware Document analytical, numerical, and experimental results in scientific papers Implement, maintain, and manage a codebase that colleagues without expertise in quantum error correction (QEC) or fault‑tolerance can use to run quantum algorithms fault‑tolerantly on quantum computing hardware Required qualifications, capabilities, and skills Ph.D. degree in computer science, physics, math, engineering, or related fields, or equivalent experience Competency in the basics of qubit‑based stabilizer QEC: stabilizer and subsystem codes; CSS codes; parity check matrices; logical and gauge operators; thresholds and pseudo‑thresholds; Clifford and non‑Clifford gates; Shor, Steane, and Knill QEC; code distance and effective (circuit) distance Experience with analytical and numerical circuit‑level investigation of QEC and FTQC: constructing circuits for QEC cycles, state preparation, and logical operations; specifying noise models; building detector error models; running numerical simulations; decoding; computing logical error rates Experience building quantum circuits in a major software framework such as Cirq, Qiskit, or Pytket Fluency in at least one of: Python, Julia, C++, Rust Strong oral and written communication skills, strong scientific publication record Preferred qualifications, capabilities, and skills Experience developing a successful research program focused on the development of protocols for universal FTQC Experience designing fault‑tolerant gadgets for state preparation and logical gates Understanding of magic‑state distillation and cultivation protocols Understanding of generalized code surgery, code adapters and extractors Understanding of concatenated code constructions and code families Understanding of dynamical codes Understanding of ZX calculus and fault‑tolerant rewrites and experience with circuit‑level quantum compilation Compensation and benefits We offer a competitive total rewards package including base salary determined based on the role, experience, skill set and location. Eligible roles may receive commission‑based pay and/or discretionary incentive compensation. We also offer a range of benefits and programs to meet employee needs including health care coverage, retirement savings plan, backup childcare, tuition reimbursement and mental health support. Equal Employment Opportunity We recognize that our people are our strength and the diverse talents they bring to our global workforce are directly linked to our success. We are an equal opportunity employer and place a high value on diversity and inclusion at our company. We do not discriminate on the basis of any protected attribute, including race, religion, color, national origin, gender, sexual orientation, gender identity, gender expression, age, marital or veteran status, pregnancy or disability, or any other basis protected under applicable law. We also make reasonable accommodations for applicants' and employees' religious practices and beliefs, as well as mental health or physical disability needs. Visit our FAQs for more information about requesting an accommodation. JPMorgan Chase & Co. is an Equal Opportunity Employer, including Disability/Veterans. #J-18808-Ljbffr University of Georgia- FACS