Post Silicon Engineer (eInfochips)

Post Silicon Engineer (eInfochips) Location: Cupertino, CA and Austin, TX Experience: 8+ Years What You’ll Be Doing: As a Senior Validation Engineer on our Machine Learning Acceleration team you will work from early design validation through emulation, silicon bring‑up, post‑silicon validation, and ongoing support of production systems deployed in AWS data centers. You’ll collaborate deeply with architecture, RTL design, design verification, firmware, and software teams to ensure our next‑generation AI/ML accelerators meet the highest standards of quality and performance. This role requires bridging multiple domains and a broad scope of impact—from low‑level hardware interfaces to high‑level ML workloads—to deliver exceptional results. A day in the life Develop comprehensive validation strategies and lead new methodologies to improve validation coverage and time to root cause. Develop detailed test plans covering functional, performance, power, and stress testing from silicon bring‑up to product release. Mentor and provide direction to junior validation engineers. Execute complex test plans from RTL simulation and emulation environments through physical silicon validation. Perform hands‑on debugging including silicon bring‑up and lab debugging using oscilloscopes, logic analyzers, and protocol analyzers. Validate ML accelerator performance, accuracy, and reliability using real‑world neural network workloads. Build test infrastructure, CI/CD, and automated regression frameworks to enable efficient validation at scale. Collaborate across architecture, design, firmware, and software teams to triage failures and drive root cause analysis to closure. Review test results, identify patterns, and provide feedback to improve design quality and validation coverage. Deliver new tests to production systems in AWS data centers and manufacturing to improve fleet health. What We Are Looking For: Strong programming skills (Python, Lua, C/C++, Rust, Go, etc). A solid understanding of computer architecture and chip/system validation methodologies. Experience with cloud infrastructure and CI/CD. Firmware testing and/or development (BIOS, BMC, drivers). Domain expertise in areas such as PCIe, HBM, GPUs, neural networks, and ML hardware architecture. Knowledge of the full validation lifecycle from RTL simulation (SystemVerilog/UVM, VCS, Questa, Xcelium) and emulation (Palladium, Zebu, Veloce) through silicon failure analysis and debug. 5+ years of programming with at least one software programming language. Bachelor's degree or above in computer science, computer engineering, or a related field. 5+ years of non‑internship system test development, code reviews, source control management, build processes, automated deployments, and operations experience. Experience with Linux environments and Git. Experience with server hardware and debug tools. Experience with Machine Learning hardware/software architecture. Education: Bachelor's degree. Work Arrangement: Fully onsite. Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership. Location: Bedford, MA (Day‑1 Onsite) EEO Statement: Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran, or disability status. #J-18808-Ljbffr Arrow Electronics Australia Pty Ltd