R&D Engineering, Staff Engineer (Fusion Compiler GPU Acceleration)
Synopsys Inc
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an accomplished engineering leader with over 3‑6 years of experience in developing large‑scale applications, particularly within the EDA domain. Your expertise spans the entire lifecycle of solution development—from initial specification to hands‑on implementation, customer engagement, and iterative refinement. You thrive in environments that demand both deep technical prowess and strong leadership, and you are passionate about mentoring the next generation of engineers. Your background in C/C++ development is robust, and you approach new languages and technologies with curiosity and adaptability, making you an ideal fit for our dynamic team. Having experience with CUDA, GPU acceleration and GPU architecture knowledge is a plus. You possess a keen understanding of physical design, with proven experience in placement, routing, and the intricacies of advanced node constraints. Your approach to software design is rooted in Design Thinking and the strategic use of design patterns. You are comfortable owning complex projects, navigating ambiguity, and collaborating with cross‑functional teams to deliver impactful solutions. Your communication skills enable you to convey technical concepts to both peers and customers, ensuring clarity and alignment. Above all, you are committed to continuous innovation, operational excellence, and sharing your knowledge to elevate the team’s collective capability. What You’ll Be Doing: Enabling GPU Acceleration for Fusion Compiler entire R2G flow. This includes GPU acceleration of each of the engine in R2G flow with new problem formulation to take advantage of GPU architectures. These engines include placement, global routing, detail routing, CTS, optimization, timer, extraction, legalizer and synthesis. Owning projects end‑to‑end—from requirements gathering and design specification to development, testing, and customer interaction—ensuring high‑quality deliverables. Collaborating closely with cross‑functional teams, including product management and product engineering. The Impact You Will Have: Delivering GPU Accelerated Fusion Compiler, which will be game changing for chip design and implementation steps by reducing flow cycle times from weeks to days (or hours). Empowering Synopsys customers to achieve faster turn around time and accelerating their design cycles and reducing time to market. Elevating the technical excellence of the team by sharing best practices, fostering a culture of learning, and mentoring future leaders. Shaping the roadmap for Digital Implementation solutions, ensuring that Synopsys remains at the forefront of EDA technology. What You’ll Need: Minimum 3‑6 years of hands‑on experience in developing software projects, preferably in EDA or semiconductor domains. Expert proficiency in C/C++ development, with a proven track record of delivering robust, scalable solutions. Experience with physical design, placement, and routing flows in EDA tools. Experience with CUDA, GPU acceleration and GPU architecture knowledge is plus. Strong knowledge of software architecture, Design Thinking, and use of design patterns. Excellent communication skills for technical interactions. Who You Are: Innovative thinker who embraces new technologies and methodologies. Strong problem solver with a strategic mindset and attention to detail. Effective communicator, able to translate complex technical concepts for diverse audiences. Collaborative team player, eager to contribute and learn from others. Adaptable and resilient in the face of evolving challenges and requirements. The Team You’ll Be A Part Of: You’ll join the Fusion Compiler GPU Acceleration team in Synopsys Sunnyvale, CA (or Hillsboro, OR), a group of passionate engineers focused on developing industry‑first and game changing GPU Accelerated Digital Implementation solution. This development is part of Nvidia/Synopsys GPU Acceleration collaboration. This team is driving innovation in EDA and empowering customers worldwide by accelerating their design cycles and reducing time to market. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. #J-18808-Ljbffr Synopsys Inc
- Synopsys Inc is seeking an accomplished engineering leader in Sunnyvale, CA, with 3-6 years of experience in developing... ...scale applications in EDA. The role focuses on enabling GPU acceleration for the Fusion Compiler, collaborating across teams, and mentoring the next...Suggested
- Synopsys is looking for an Engineering Leader in Sunnyvale, CA, to enable GPU Acceleration in their Fusion Compiler. The ideal candidate will have 3-6 years of experience in developing applications within the EDA domain and proven expertise in C/C++. Responsibilities include...Suggested
- Applications Engineering, Sr Staff Engineer- RTL-to-GDS/Fusion Compiler Join to apply for the Applications Engineering, Sr... ...Collaborating closely with Synopsys R&D and Product Engineering teams to... .... Impact You Will Have Accelerate customer success by ensuring smooth...SuggestedFull time
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We are looking for experienced Systems SW Compiler Engineers for an exciting role in our PTX (Parallel Thread Execution) Compiler Development... ...language design and PTX compiler evolution. PTX enables all GPU computing applications including HPC, Deep Learning and Autonomous...Suggested- Neurophos is hiring an ML Compiler Engineer to lead compiler development for a novel LLM accelerator. You will bridge high‑level AI workloads with hybrid optical‑electronic compute hardware, delivering game‑changing performance. Location: San Jose, CA or Austin, TX. This...SuggestedFull time
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...hardware and software engineers to identify and address... ...Do Adapting torch.compile to our backend:... ...Where existing DSLs' GPU assumptions break, deciding... ...the framework layer. Fusion, tiling, and memory... ...backends for non-CUDA accelerators (XPU, ROCm, MPS, TPU,...Live inWork at officeFlexible hours- Google is seeking a Software Engineer in Mountain View, California, focused on compiler development for next-generation technologies. You will work on LLVM infrastructure... ...Computing capabilities on Google's TPU accelerators and contribute to research impacting billions of...
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...the point of care. Status: Full‑time, Exempt Location: Onsite, Santa Clara, CA Reports to: Vice President R&D About The Role We are seeking a Staff R&D Engineer (Catheter & Mechanical Systems) to lead development of catheter systems and mechanical workstreams within the...Permanent employmentFull timeWork at officeRelocationVisa sponsorshipWork visa- ...system design. Join the Calibre™ Semi R&D Team at Siemens EDA We are seeking a highly... ...geometry, distributed processing, GPU acceleration, etc.). About Us The Calibre™ family of... ...Computer Science, Applied Mathematics, or Engineering (Electrical, Mechanical, Civil, etc.),...Work at officeWork from home
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...machine learning (ML) engineers, software engineers, and... ...Camera, Lidar, Radar). To accelerate the fidelity,... ...will report to a Senior Staff Engineering Manager. You... ...TPUs, GPUs), leveraging compiler features and low-level... ...Knowledge of TPU and GPU architectures and how to...- ...are required. Knowledge of several Clock Tree Synthesis methodologies like H-Tree, MS-CTS is preferred Back end P&R tools (Fusion Compiler, ICC2, Innovus) Excellent verbal and written presentation/communication skills are mandatory. Customer sensitivity, the...
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.... Responsibilities At Keysight Design Engineering Software (DES), we build electronic design... ..., modules, and systems. Our tools accelerate innovation across industries such as telecommunications... ...(TCP) Interest in or exposure to compiler‑adjacent work: expression parsing, AST...$168k - $264.5k
...transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a... ...era of computing. An era in which our GPU acts as the brains of computers, robots,... ...creative and passionate Senior Software R&D Engineer specializing in VLSI Physical Design....- Senior Staff R&D Electrical Engineer Responsibilities The Senior Staff R&D Electrical Engineer will operate in a dynamic, R&D environment developing semiconductor capital equipment in close collaboration with software, mechanical and process engineers This role will act...
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...Bachelor's degree in Electrical Engineering, Computer Engineering,... ...the future of AI/ML hardware acceleration. You will have an opportunity... ...AI/ML-driven systems. As a Staff Co-Design Engineer on the TPU... ...across hardware design, compiler development, and ML research...Worldwide
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