Firmware/FPGA Engineer Mid-Level
Aviation & Missile Solutions
Aviation & Missile Solutions, LLC. (AMS) is seeking a talented Electrical or Computer Engineer to join our diverse team in Huntsville, AL., to create unique solutions for complex problems. AMS provides responsive, cost-effective engineering and scientific solutions ranging from air and missile defense technologies, command and control, radar systems, seekers, electronic warfare (EW), modeling & simulation, and prototype hardware development and testing.
Position Description:
The Firmware/FPGA design engineer will work with a multi-disciplined design team (systems engineers, electrical engineers, computer scientists, mechanical engineers, etc.) to design, develop, simulate, and integrate challenging DSP designs for radar, seeker, and/or electronic warfare (EW) systems. The role will provide the opportunity to design and develop unique FPGA design solutions for various hardware platforms, with the opportunity to advance your FPGA techniques under subject matter experts to guide your development. In addition, the role provides opportunities to mentor newer employees in firmware and FPGA design. The role expected to work in a fast-paced development environment under a multi-disciplinary design team to quickly develop, integrate, test, and verify final products.
Keyword: Firmware/FPGA Engineer Mid-LevelRequired Experience:
Basic Qualifications (required):
- Candidate must possess a Bachelor's degree in Electrical Engineering, Computer Engineering or Computer Science from an ABET-accredited university and a minimum of 5 years of applicable experience.
- Resident of the Huntsville, AL area or be willing to relocate.
- Good people skills and the desire to work with a highly technical team of engineers and scientists.
- Collaborate in a multi-disciplinary design team to implement and integrate FPGA designs into radar, seeker, and or EW systems.
- Analyze, design, simulate, and implement algorithms in hardware description languages (HDL); such as VHDL/ Verilog/SystemVerilog, based on Matlab models
- Implement HDL test benches for code validation against Matlab models
- Practical experience of Xilinx, Altera, or Microsemi FPGA technology
- Deriving detailed hardware, PCB, and firmware requirements for complex systems
- Ability to debug and test new hardware and firmware designs and support module integration
- Analyze schematic diagrams for either custom or commercial-of-the-shelf electronic hardware to support high-speed analog and/or digital circuitry for FPGA-centric designs
- Good problem-solving skills, willing to take ownership as well as positively contribute to multi-disciplinary teams
- Prepare technical documents and reports
Preferred Skills/Abilities:
- Familiarity with modern Xilinx FPGA families and design tools (7-series FPGAs, Ultrascale+, Vivado, Xilinx IP cores)
- Experience working with System on Chip (SoC) designs such as Zynq and Zynq Ultrascale+ including architecting and interfacing with peripherals, interrupts, and related bus architectures.
- Experience with high-speed Analog to Digital Converters (ADC), Digital to Analog Converters (DAC), or the Zynq Ultrascale+ RFSoC
- Experience developing and implementing FPGA-optimized versions of DSP algorithms (e.g., modulation/demodulation, PLLs, filters, image processing).
- Assisting in writing SoC software interfaces to firmware modules in programmable logic
- Experience in radar or EW fields
Travel Requirements:
- Must be able to travel 10% of the year.
Physical Requirements:
- Prolonged periods of sitting at a desk and working on a computer.
- Must be able to lift 15 pounds at times.
- Must be able to access and navigate each department at the organization's facilities.
Security Requirements:
- Citizenship: Candidate must a US only citizen.
- Clearance level: Candidate must be able to obtain a Secret security clearance or higher.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, or status as a protected veteran.
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