Senior ASIC Design Engineer
$150k - $250kCyberCoders
Job Title: Senior ASIC Design EngineerJob Location: Santa Clara, CA or Boston, MACompensation: $150K - $250K base DOE plus equityRequirements: ASIC Design, RTL (Verilog/SystemVerilog), Microarchitecture, UCIe / Ethernet / High-Speed I/O, AI Accelerator, Memory Subsystem DesignPosition OverviewWe are seeking a highly skilled Senior ASIC Design Engineer to lead the design and development of advanced ASIC solutions. The ideal candidate will have a strong background in ASIC design and a passion for innovation in silicon architecture, particularly in AI datacenter applications.Key ResponsibilitiesLead the design and development of complex ASIC projects from concept to production.Develop RTL code using Verilog and SystemVerilog for various components including Microarchitecture and SOC designs.Collaborate with cross-functional teams to define requirements and deliver optimized designs that meet product specifications.Perform extensive verification and validation of designs to ensure high-quality outputs and compliance with standards.Engage in IP design and integration, focusing on Ethernet, UCIe, UALink, and HBM technologies.Contribute to the architecture and design of memory subsystems and cache coherence mechanisms.Mentor junior engineers and provide technical guidance on best practices in ASIC design.QualificationsBachelor's (Master's or PhD preferred) in Electrical Engineering, Computer Engineering, or related field.5+ years of experience in ASIC design and development.Proficient in RTL design using Verilog and SystemVerilog.Strong understanding of Microarchitecture, SOC design, and IP design practices.Experience with Ethernet, UCIe, PCIe, UALink, and HBM technologies.Familiarity with silicon architecture concepts, particularly in AI datacenter applications.Knowledge of memory subsystem design and cache coherence strategies.BenefitsCompetitive salary commensurate with experience including base salary, performance-based bonus, and early-stage equity grantComprehensive benefits including health, dental, vision, and life insuranceWell-equipped, sunny offices in Santa Clara, CA and Boston, MARelocation assistance and visa sponsorshipPerks include a daily lunch stipend, 401k match, and moreA collaborative, continuous-learning work environment with smart, dedicated colleagues engaged in developing the next generation of architecture for high-performance computing
$150k - $250k
Job Title: Senior ASIC Verification EngineerJob Location: Santa Clara, CA or Boston, MACompensation... ...highly skilled Senior ASIC Verification Engineer to join our dynamic team. This role is... ...modern data centers and applications to design memory acceleration.Key...Senior- ...innovate and grow, we’re searching for a forward-thinking Senior FPGA Design Engineer to help us build the future of capital markets infrastructure... ...+ years of experience in digital logic design for FPGAs or ASICs Proficiency in SystemVerilog (preferred) or VHDL Deep...SeniorFull timeWork at office
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