ASIC & FPGA Design Engineer Sr Stf - E5

Requisition ID: 15383ERP Eligible?: YesERP amount: $50 LMRecognitionRelocation: PossibleType: ExemptShift: 1Clearance Prior to Start: SecretFinal Clearance: SecretPay Transparency: $166,900.00 - $309,900.00Experience Level: Experienced ProfessionalFT/PT/Casual: FullTimeDepartment: SpaceBusiness Unit: SpaceStandard Job DescriptionJoin Our Team as a ASIC/FPGA Design Engineer Sr Staff where you will work on the development of a sophisticated state-of-the-art avionics product in a world class Integrated Product Development environment.Location: This position does not support teleworking; the selected candidate will be located near our Lockheed Martin Space facility in:• Littleton, COYou will be working a flexible 9x80 schedule in the office full-time.The information below reflects the standard job description for this position:Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results.Basic QualificationsExperience in the design of FPGA and/or ASIC devices.HDL programming experience with VHDL, Verilog, and/or SystemVerilog.Willing and able to obtain and maintain a DoD Secret clearance, thus US Citizenship is required for this position.Equivalent experience/combined education.Acitve Secret Clearance.Desired SkillsBachelor of Science or higher from an accredited college in Electrical Engineering or related discipline.Understand the basics of Digital Signal Processing (DSP) implementation, and have the ability to implement a defined module or part of an algorithm.Experience with DSP methodologies (Nyquist sampling, FFT/IFFT, digital filtering, FIR filters)Familiar with MATLAB, C/C++, and VHDL/Verilog DSP implementation.Understanding Fixed vs. Floating-Point processing.Experience or coursework in the design of FPGA and/or ASIC devices.Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).Knowledge of Forward Error Correction (FEC), interleaving/de-interleaving, hopping/dehopping, modulation/de-modulation, channelizers and reconstructors.Experience with ADC and DAC implementation.Experience or knowledge of MS Project, JIRA.Experience leading projects of multiple engineers, managing schedules. prioritizing work and actively communicating with internal or external stakeholders.Knowledge of space-grade/qualified FPGAs and ASICs.Experience with Earned Value Management System (EVMS).Experience in 5G and/or LTE is a plus.Experience mentoring junior engineers.Pay InformationFull-Time Salary Range: $166900.00 - $309900.00At Lockheed Martin, we know mission success starts with taking care of our people. Our Total Rewards program is designed to attract top talent, support your well-being, and help you grow—both professionally and personally.The salary range for this position is as listed on the requisition. Please note that the salary information listed is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market(work location) and business considerations when extending an offer. Benefits offered: Medical, Dental, Vision, Flexible work arrangements and schedules (e.g., 4x10), 401(k) match, Paid time off, Holidays, Parental Leave, EAP, Flexible Spending Accounts, Education Assistance, Life Insurance, Short-Term Disability, and Long-Term Disability.Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.For (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.