Analog and Mixed-Signal ASIC Design Engineer

Analog and Mixed-Signal ASIC Design Engineer
Battelle is seeking an experienced Analog and Mixed-Signal ASIC Design Engineer to join its Advanced Microsystem Solutions Business Line in Columbus, Ohio. The role involves designing and validating custom integrated circuits for advanced cybersecurity and embedded systems, working within a multi-disciplinary team of experts.

Responsibilities:

Design and develop analog and mixed-signal integrated circuits for advanced security and embedded computing applications.

Perform architecture trade studies and circuit-level design of various components including ADCs, DACs, PLLs, and amplifiers.

Develop transistor-level schematics and conduct circuit simulations using industry-standard EDA tools.

Implement and verify analog and mixed-signal circuit development from architecture through to silicon bring-up.

Conduct design verification activities including pre- and post-layout simulation, parasitic extraction, and reliability verification.

Support mixed-signal integration with digital ASIC and FPGA teams.

Interface with semiconductor foundries during design and fabrication processes.

Develop laboratory test plans and perform silicon characterization and debugging.

Lead technical efforts, mentor junior engineers, and support proposal activities.

Qualifications:

Bachelor's degree in Electrical Engineering or related field with 3 years of relevant experience; Master's degree with 1 year; or PhD.

Demonstrated experience in designing analog or mixed-signal integrated circuits that have reached fabrication and silicon validation.

Strong understanding of CMOS device physics and analog circuit fundamentals.

Experience with EDA tools such as Virtuoso, Spectre, and Calibre.

Experience with schematic capture, analog simulation, and DRC/LVS verification.

Familiarity with semiconductor foundries and process design kits (PDKs).

Understanding of mixed-signal integration challenges.

Ability to work independently and in a multi-disciplinary environment.

Must be a US Citizen with eligibility for a Top-Secret clearance.

Skills:

Active Top Secret Clearance with SCI eligibility (preferred).

Experience integrating analog IP into larger ASIC or SoC designs.

Knowledge of Verilog, Verilog-A, or SystemVerilog.

Familiarity with digital ASIC implementation and verification flows.

Experience with advanced process nodes and designing for radiation tolerance.

Strong laboratory skills including the use of oscilloscopes and spectrum analyzers.

Proficiency in Python, MATLAB, or similar scripting environments.

Experience leading technical discussions and small IR&D tasks.

Ability to build teams of technical experts for collaboration on complex problems.

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