Senior FPGA Design Engineer, High-Speed Networking

Arista Networks is seeking an experienced FPGA Design Engineer to drive RTL/ SystemVerilog development for high-speed networking hardware used in data centers and campus networks. You will own the full design lifecycle from architectural requirements through verification, bring-up, and production deployment, collaborating with hardware, software, and manufacturing teams. Qualifications emphasize 5+ years of Verilog/SystemVerilog RTL design, control path experience, and PCIe/AXI/I2C/SPI/MDIO