DRAM IP Architect IO & Clocking Lead
Micron Technology Inc
Micron Technology, Inc is seeking a Principal SMTS for DRAM IP design to architect, design and verify high-speed IO and clocking circuits for next‑generation DRAM products, focusing on timing, jitter, and signal integrity. Relocation to Boise, ID is required; the role involves collaboration with Product Engineering, SI and process teams to push performance while mentoring junior engineers. Candidates should have MSEE with 10+ years or BSEE with 12+ years, plus strong communication and leadership #J-18808-Ljbffr
Vacancy posted 4 days ago
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