Hybrid Senior Design Verification Engineer (Emulation)
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Hewlett Packard Enterprise in Sunnyvale, CA seeks a Senior Design Verification Engineer specializing in emulation-based verification to drive system-level verification ahead of silicon tape-out. You will build robust UVM testbenches, run constrained-random tests, and validate with emulation platforms such as Palladium/ZeBu/Veloce.
The role emphasizes collaboration with design and validation teams, coverage goals, and early software bring-up on hardware accelerators in a hybrid work model.
#J-18808-Ljbffr Jobleads-USVacancy posted 10 hours ago
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