Field-Programmable Gate Arrays Engineer

Responsibilities Documents and analyzes design requirements for implementation. RTL coding, simulating and implementation Pin assignment based on hardware design Keeps the HW/SW interface documents up to date Develops interface and control logics for serial buses (I2C, SPI, UART…) Develops control algorithms for motor driver circuits Develops control algorithms for analog front end circuits Hardware bring-up and troubleshooting Supports firmware and system integration and test Applies risk, failure analysis, and root cause analysis as required within the engineering Ensures all the design activities and documents meet the regulatory and QMS Qualifications Proficient with FPGA design and workflow, familiar with mainstream FPGAs and the development tools. Good RTL coding practices, familiar with both VHDL and Verilog. Familiar with embedded interface protocols development (I2C, SPI, UART…) Sufficient knowledge of electronics principles and circuits design, familiar with schematics design tools. Proficient with lab instruments to do measurement and troubleshooting. Excellent communication and presentation skills Show high initiative and collaboration, be self-motivated, and have ability to act independently on technical matters. #J-18808-Ljbffr CoreTek Labs