Hybrid Senior ASIC Physical Design Engineer
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Hewlett Packard Enterprise is seeking a Senior ASIC Physical Design Engineer in Colorado to design and implement high‑performance ICs. You will collaborate with ASIC design, physical implementation, DFT, signal integrity, and architecture teams to enable physically aware designs and scalable methodologies.
You will drive timing closure, create timing budgets, and develop automation for synthesis, timing analysis, and signoff.
#J-18808-Ljbffr Jobleads-USVacancy posted 1 day ago
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