Mechanical DFM Engineer

About Etched

Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

We are seeking a hands-on manufacturing leader to drive Design for Manufacturing (DFM), supplier execution, and design validation across complex mechanical components. This role partners closely with suppliers to develop, qualify, and scale robust manufacturing processes across CNC machining, die casting, sheet metal, stamping, and sub-assemblies. The ideal candidate will lead tooling, automation, inspection strategy, and DOE-driven process development while ensuring supplier readiness for builds and production ramp. By owning qualification builds (EVT/DVT/PVT), driving root cause resolution, and leading continuous improvement initiatives, this role ensures high-quality, cost-effective, and scalable production aligned with program milestones.

Key Responsibilities

• Review supplier tool designs, fabrication process flows, equipment selection, DFM strategies, and DOE proposals (CNC machining, die casting, sheet metal, stamping, sub-assemblies).
• Develop and qualify manufacturing processes for mechanical components across key fabrication methods.
• Drive fixture, tooling, and automation development in partnership with suppliers.
• Establish inspection strategies and metrology requirements for tight-tolerance components.
• Lead continuous improvement initiatives to improve cycle time, yield, cost, and overall process robustness.
• Partner with supplier engineering teams to define process development plans, secure resources, and align schedules with program milestones.
• Assess supplier readiness for build events and production ramp; proactively identify risks and implement mitigation plans.
• Provide onsite technical leadership during line bring-up, pilot builds, and ramp readiness activities.
• Ensure supplier process capability meets defined quality, cost, and delivery targets for mass production.
• Plan, propose, and lead structured experiments (DOE) to generate data that drives design, development, and supply chain decisions.
• Own process qualification builds (EVT/DVT/PVT) and drive corrective actions to close yield and quality gaps.
• Perform structured root cause analysis (8D, DMAIC, fishbone, DOE) and implement sustainable corrective actions.
• Translate build learnings into actionable design and process improvements to strengthen product validation and production readiness.

You may be a good fit if you have

• Experience supporting L6-L11 data center compute platforms, high-performance computing (HPC) systems, and complex industrial products.
• Familiarity with high-density server packaging constraints, including airflow management, serviceability, blind-mate connector systems, and rack-level integration requirements
• Demonstrated ability to drive cost reduction without compromising quality or performance.
• Strong understanding of server architecture constraints including SI/PI (signal and power integrity), thermal-mechanical reliability, and high-speed interface requirements.

Benefits

• Medical, dental, and vision packages with generous premium coverage
  
  • $500 per month credit for waiving medical benefits
• Housing subsidy of $2k per month for those living within walking distance of the office
• Relocation support for those moving to San Jose (Santana Row)
• Various wellness benefits covering fitness, mental health, and more
• Daily lunch + dinner in our office
• Unlimited compute budget subject to ROI justification

How we're different

Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.