Senior Signal Integrity Lead for High-Speed PCBs

SR Staff - Signal Integrity Engineer Signal integrity engineer provides design guideline and support to system architecture design, board layout, product bring up, debug, validation, and factory builds. Performs testing, simulation, validation and qualification of systems and makes design adjustments as needed. The Signal integrity engineer works in cross functional teams with other designers, customers, manufacturing engineering and project leadership to ensure robust and high quality product development. Enhance designs with feedback from reviews in areas such as manufacturing, test, supply chain, reliability, industrial design and simulations. Responsibilities Model high-density I/O's on PCBs, packages, connectors and probe cards with respect to parameters such as reflections, bandwidth, and crosstalk Lead the design, development and implementation of technical solutions for complex projects, involving multiple domains. Participate in project planning and scheduling. Perform transmission line and via modeling and carry out experiments to validate modeling outcomes and methodologies. Analyze and review the layout files related to Signal integrity and Power Integrity problems. Provide practical solutions to PCB/Package design team based on simulation results and analysis. Conduct simulation of memory interfaces for Board and Package and high speed serial IO interfaces for Board and Package. Perform decoupling capacitor optimization and loop inductance analysis. Qualifications Strong knowledge in simulation tools like Hspice, Sigrity, ADS, Ansys SIwave, HFSS 3D. Strong knowledge in Signal Integrity and Power Integrity fundamental concepts. Strong experience in Package and PCB modeling. Keep up to date with relevant industry knowledge and regulations. May be a recognized expert (go to person) in one or more technical areas. Typical experience 11 to 14 years. Typical education: Bachelor degree in electrical engineering or equivalent. Physical Demands Duties performed in a normal office environment. May require extended periods of sitting and sustained visual concentration on a computer monitor or detailed data. Repetitive manual movements (e.g., data entry, using a computer mouse, calculator use) are frequently required. Occasional travel may be required. Equal Employment Opportunity All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. Celestica’s policy on equal employment opportunity prohibits discrimination based on race, color, creed, religion, national origin, gender, sexual orientation, gender identity, age, marital status, veteran or disability status, or other characteristics protected by law. This policy applies to hiring, promotion, discharge, pay, fringe benefits, job training, classification, referral and other aspects of employment and also states that retaliation against a person who files a charge of discrimination, participates in a discrimination proceeding, or otherwise opposes an unlawful employment practice will not be tolerated. All information will be kept confidential according to EEO guidelines. #J-18808-Ljbffr Celestica Inc.