ASIC Engineer Intern — Design, Verification & Tools
Thinklance LLP
Thinklance LLP in Sunnyvale, CA offers a student internship across ASIC Design, Verification, or Tools & Methodologies. You will collaborate closely with senior engineers to explore architectures, write SystemVerilog, build testbenches, and optimize development flows. Strong communication and time-management skills are essential. The role welcomes Bachelor’s or Master’s students in Electrical/Computer Engineering, Computer Science, or related fields, with coursework in digital logic, computer #J-18808-Ljbffr Thinklance LLP
Vacancy posted 1 day ago
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