Design Verification Engineer, AI Hardware

What To Expect The Tesla AI Hardware team is at the forefront of revolutionizing artificial intelligence through cutting-edge hardware innovation. Comprising brilliant engineers and visionaries, the team designs and develops advanced AI inference chips tailored to accelerate Tesla’s machine learning capabilities. A key part of this effort is Dojo, Tesla's custom supercomputer system built to efficiently train massive neural networks on vast video data from the fleet. The work of Tesla's AI Hardware team powers the neural networks behind Full Self-Driving (FSD), and Tesla humanoid robot, Optimus, pushing the boundaries of computational efficiency and performance. By creating custom silicon and optimized architectures, the team ensures Tesla remains a leader in AI-driven automotive and energy solutions, shaping a future where intelligent machines enhance human life. The AI Hardware team is looking for a SOC Verification Engineer who will be responsible for RTL verification of top-level SOC. With a strong knowledge of SOC architecture and SOC verification methodologies, you will interact with multiple teams and build a metric-driven, configurable, and flexible verification environment. We are open to hiring in Austin, TX and Palo Alto, CA and at all levels Entry-level, Senior, Staff, Senior-Staff. What You'll Do Work with team members to define and set up a SOC-level verification environment Architect highly reusable UVM based test benches and integrate VIPs, sub-system test benches, and develop test suites at the SOC level Achieve targeted coverage and work with Design, Architecture, SW, FW, Validation and external IP delivery teams to efficiently integrate and verify the design Execute, review, and refine testplans to achieve coverage targets Verify logic at block, IP, subsystem & fullchip level Understand details of High Efficiency SOC Architecture, standard SOC peripherals, bus protocols, Network on chip (NOC) and I/O, memory management schemes, multi-processor systems, Memory Controller Sub Systems Low power design verification What You’ll Bring 5+ years of dedicated/hands-on DV experience Experience with Gate level simulation, Timing simulation and verification Experience in SOC DV bring-up, clocks, power, reset, boot Experience verifying high speed memory IPs & IO Experience with amba bus protocols Experience verifying CPU/GPU/IPs integration at the SOC level Strong programming skills in UVM, System Verilog, C/C++, Python/Perl Post-silicon validation/SOC bringup experience, UPF Low power DV, Emulation experience Benefits Medical plans (plan options with $0 payroll deduction) Family-building, fertility, adoption and surrogacy benefits Dental (including orthodontic coverage) and vision plans, both have options with a $0 paycheck contribution Company Paid (Health Savings Accounts) HSA Contribution when enrolled in the High-Deductible medical plan with HSA Healthcare and Dependent Care Flexible Spending Accounts (FSA) 401(k) with employer match, Employee Stock Purchase Plans, and other financial benefits Company paid Basic Life, AD&DD Short-term and long-term disability insurance (90 day waiting period) Employee Assistance Program Sick and Vacation time (Flex time for salary positions, Accrued hours for Hourly positions), and Paid Holidays Back-up childcare and parenting support resources Voluntary benefits to include: critical illness, hospital indemnity, accident insurance, theft & legal services, and pet insurance Weight Loss and Tobacco Cessation Programs Tesla Babies program Commuter benefits Employee discounts and perks program Expected Compensation $128,000 - $432,000/annual salary + cash and stock awards + benefits Pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. The total compensation package for this position may also include other elements dependent on the position offered. Details of participation in these benefit plans will be provided if an employee receives an offer of employment. , Tesla #J-18808-Ljbffr Tesla