Manager, System Level Performance Attainment

THE ROLE

The Manager of Silicon Design Engineering is responsible for owning end to end silicon (i.e., pre- post silicon) performance and design execution as part of the Server Performance Group. This role provides technical and organizational leadership for system-level performance attainment, hardware/software optimizations, silicon debug, and sustained performance delivery for complex SoCs and accelerators. The Manager drives cross functional alignment across architecture, modeling, design, validation, software, and product teams to ensure performance, power, and efficiency targets are met for current and future products. Direct impact on product competitiveness, customer performance outcomes, and long-term silicon roadmap success.

KEY RESPONSIBILITIES

Technical Leadership Own system level performance attainment and HW/SW optimization to improve out of box and sustained performance across silicon products. Lead post-silicon debug, regression, performance analysis, and optimization efforts to achieve committed product targets. Establish and evolve methodologies for power and performance modeling, validation, and siliconbring up. Execution & Delivery Lead execution across silicon programs, ensuring performance and power goals are met on schedule. Partner closely with architecture, RTL design, verification, firmware, system software, and product management teams. Identifyand mitigate technical and execution risks across the silicon lifecycle. Drive continuous improvement in tools, flows, and best practices for silicon design and performance engineering. People & Organizational Leadership Lead a team of silicon design and performance engineers. Set clear technical direction, performance expectations, and career development paths for the organization. Foster a culture of technical excellence, accountability, and collaboration. Cross Functional & External Engagement Represent silicon design and performance perspectives in executive reviews and customer engagements.

PREFERRED EXPERIENCE

Extensive experience in silicon design engineering, post-silicon performance optimization, performance architecture, or related technical domains. Deep understanding of SoC architecture and silicon debug. Proven experience leading engineering teams. Strongcross functionalleadership and communication skills. Demonstrated ability to drive complex technical programs from concept throughpost siliconexecution. Experience with high performance compute, CPUs, or largescale SoCs. Background in both hardware and system/software performance optimization.

ACADEMIC CREDENTIALS

Bachelor's or master'sdegree in electrical or computer engineering This role is not eligible for visa sponsorship. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s "Responsible AI Policy" is available here. #J-18808-Ljbffr Advanced Micro Devices, Inc.