Application Specific Integrated Circuit Engineer

Role: ASIC Verification Engineer

Location: Allentown PA office or Carlsbad CA

Duration: 12 Months

Key Job Responsibilities

Develop and implement Universal Verification Methodology (UVM) based verification environments.

Create comprehensive verification plans at both block and system levels.

Design and implement verification components including assertions, traffic generators, agents, and scoreboards.

Collaborate with cross-functional teams to evaluate design testability and verification requirements.

Lead debug efforts and provide solutions for complex technical challenges.

Basic Qualifications

Bachelor's degree in Electrical Engineering or a related field.

UVM Based testbench development.

Experience in ASIC or SOC verification.

Demonstrated experience in developing test plans and verification infrastructure.

Practical knowledge of verification methodologies from block level to system level.

Proficiency in System Verilog.

Experience in identifying and resolving complex design and verification issues.

Timing and gate level simulation experience.

C coding for firmware delivery for post silicon bringup

Preferred Qualifications

Bachelors/master's degree in electrical or communications engineering or a related field.

Experience with formal verification techniques including abstraction and end-to-end checking.

Experience with industry-standard tools and scripting languages (Python or Perl) for automation.

System Verilog coding and debug.

AI based CAD efficiency improvisation initiatives

High speed serial protocols preferred UCIe, PCIE etc

Analog debug experience including DAC/ADC & calibrations white-box verification.