Senior VLSI Design Engineer IO & Datapath

Western Digital is seeking an experienced engineer to drive IO and datapath solutions for memory in advanced CMOS nodes. You will collaborate with teams to meet specifications, participate in design reviews, and proactively resolve design issues while proposing innovative design methodologies. The role requires hands‑on experience with DDR/HSIO/TM/ONFI, GPIOs, ZQ/Vref, and SI/PI analysis; familiarity with Cadence Virtuoso, Synopsys HSPICE/Spectre, and mixed‑mode sim is a plus. #J-18808-Ljbffr