Lead High-Speed I/O Architect: PCIe, CXL, UA Link (San Jose)

Arm is seeking a High-Speed I/O Architect in San Jose, California, to define and design innovative on-chip interconnect architectures for scalable SoC platforms. This role includes responsibilities such as architecting high-speed interconnect subsystems like PCIe and CXL and collaborating with various teams to optimize performance and efficiency.

The ideal candidate has over 8 years of experience in the field, deep expertise in protocols, and a strong educational background in engineering. The position offers a competitive salary range and a focus on collaboration and innovation.

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