RTL Design Engineer - Power Design

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.THE ROLE:We are seeking an RTL Power Design Specialist to join our Security IP (SECIP) design team. The team is responsible for the design and verification of a wide range of embedded microprocessor (MP) subsystems and hardware accelerators that are critical to enhancing performance, functionality, and efficiency for System-on-Chip (SoC) products across all AMD business units, including client computing, server, graphics, and gaming platforms.In this role, you will collaborate closely with SoC power leads to define IP-level power specifications, establish and track power targets, and drive power optimization efforts in partnership with IP power design and power measurement teams. You will also work with the corporate power methodology team, SoC teams, and IP design teams to develop and enhance advanced power design and measurement methodologies and flows. Your expertise will play a key role in enabling IP teams to achieve aggressive power targets across a diverse range of designs and applications while maintaining high performance and product quality.THE PERSON:We are looking for a highly motivated RTL Power Design Specialist with a proven track record of technical leadership, ownership, and execution. The ideal candidate is an innovative and analytical engineer who is passionate about solving complex problems, driving continuous improvement, and developing efficient, scalable solutions. They proactively identify risks, troubleshoot technical challenges, and deliver results in a fast-paced environment.The successful candidate thrives in collaborative settings, enjoys mentoring and supporting team members, and demonstrates strong attention to detail. Excellent written and verbal communication skills, combined with effective cross-functional collaboration and strong interpersonal skills, are essential for success in this role.KEY RESPONSIBILITIES:Develop and maintain RTL-level IP power specifications, and align IP power architecture and solutions with SoC power requirements in partnership with SoC, IP functional design, and power design teams.Define, track, and drive IP power targets by correlating power design intent with measurement results and identifying optimization opportunities.Collaborate with verification teams to develop power vectors for simulation-based power measurements.Partner with static power measurement teams to develop and maintain power regression infrastructure, monitor power health metrics, debug power-related issues, and analyze results to drive design improvements.Work with corporate power methodology and SoC power teams to adopt advanced power architecture, design, analysis, and measurement methodologies to meet the SoC power requirements.Contribute to corporate power methodology development and, as an advanced team member, influence the SoC power team's IP-level power strategy.Provide technical leadership in power architecture, design, analysis, and measurement methodology development, while mentoring team members and promoting best practices across projects.PREFERRED EXPERIENCE: Proficiency in Verilog/SystemVerilog and scripting languages such as Python, Tcl, Perl, and Ruby, as well as Makefile-based development environments. Deep knowledge of modern RTL-level power architecture, design, analysis, measurement methodologies, and industry best practices. Strong understanding of microprocessor (MP) subsystem architectures, RTL microarchitectures for datapath accelerators, and low-power design methodologies. Solid understanding of industry-standard on-chip bus and interface protocols, including AMBA, AXI, and AHB. Experience with ASIC design and verification tools, including RTL simulation, linting, synthesis, power-aware verification, debugging, and related design flows. Demonstrated ability to collaborate effectively across IP, SoC, methodology, and verification teams to drive technical solutions and achieve project goals.Academic credentials:Bachelor's, Master's, or Ph.D. degree in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field. LOCATION: Austin, TX (open for other AMD locations) ******This role is not eligible for visa sponsorship.#LI-SL3#LI-HYBRID Benefits offered are described: AMD benefits at a glance.AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.This posting is for an existing vacancy.