Senior Design Verification (DV) Engineer - IPS

Location: Texas, USA Experience: 10+ Years Job Description We are seeking an experienced Senior Design Verification (DV) Engineer with 10+ years of experience in hardware design verification, specifically with IPS (Intellectual Property Subsystems) verification. The ideal candidate should have strong hands-on experience developing and executing verification environments, validating complex IP/subsystem designs, and debugging functional issues. Key Responsibilities Develop and execute verification plans and test strategies for IP and subsystem-level designs. Perform functional verification of IPS blocks and ensure design functionality meets specifications. Develop and maintain testbenches using SystemVerilog and UVM. Create constrained-random and directed tests, assertions, and functional coverage models. Debug simulation failures and collaborate with RTL design teams to resolve issues. Perform functional coverage analysis and drive coverage closure. Participate in design reviews, verification planning, and regression activities. Required Skills 10+ years of experience in Design Verification. Strong hands-on experience in IPS verification . Proficiency in SystemVerilog and UVM. Experience with functional verification, constrained-random testing, assertions, and coverage-driven verification. Strong debugging skills and experience with simulation and verification tools. Experience working with complex IP/subsystem designs. #J-18808-Ljbffr Progile Tech