Senior PCB Design Engineer

Senior PCB Design EngineerArista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges.At Arista we value the diversity of thought and perspectives that each employee brings to the table. We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation.Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do.Job DescriptionWorking closely with cross-functional teams including Hardware Design, Signal Integrity (SI), Power Integrity (PI), Mechanical Engineering, Thermal Engineering, and Manufacturing, our engineers innovate on system architectures and ultra-high-speed PCB designs to deliver state-of-the-art networking platforms.Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in enterprise campuses, hyperscale datacenters, and next-generation AI clusters. The team is responsible for end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments — including optical interface platforms up to 800G and 1.6T.Core ResponsibilitiesHigh-Speed Layout & RoutingImplement complex routing for advanced interfaces such as 112G/224G SerDes, PCIe Gen 5/6, DDR4/5/6Design and route high-speed differential pairs with tight skew and impedance controlExecute dense BGA fan-out for high-pin-count ASICs and FPGAsOptical Transceiver PCB Layout (800G / 1.6T)Design and layout boards supporting high-bandwidth optical transceivers (QSFP-DD, OSFP, OSFP-XD or equivalent)Route 112G / 224G PAM4 electrical channels between switch ASICs and optical modulesDefine insertion loss budgets and coordinate with SI engineers to meet IEEE compliance requirementsOptimize breakout routing beneath high-density optical cagesImplement via stub mitigation strategies including backdrilling for ultra-high-speed signal pathsManage ground reference continuity, EMI control, and return path integrity near optical connectorsConsider thermal dissipation (20W–30W+ modules) in layout planningImpedance Control & Signal IntegrityDesign advanced multi-layer stack-ups (20–30+ layers)Calculate impedance profiles and ensure low-reflection, low-crosstalk performanceCollaborate with SI teams on channel modeling and pre-/post-layout simulationsPower Integrity (PI) OptimizationDesign robust Power Distribution Networks (PDNs) for high-current ASICsLayout multi-phase DC/DC converters for high transient loadsStrategically place decoupling capacitors to ensure wideband impedance stabilityThermal & Mechanical CoordinationIntegrate thermal vias, heat sink attachments, and high-conductivity materialsCoordinate mechanical constraints such as enclosure, airflow, and structural limitationsEnsure proper placement and structural integration of optical cagesAdvanced Fabrication DeliverablesGenerate comprehensive manufacturing packages (Gerber, ODB++, IPC-2581)Define backdrilling parameters and impedance specificationsEnsure compliance with DFM, DFA, and DFT requirementsSupport boards through fabrication, assembly, and production rampLibrary & Feasibility OwnershipCreate and maintain high-density component footprints (e.g., large BGAs, optical module connectors)Participate in new product feasibility studiesDevelop detailed routing guidelines and work packages for layout partnersReview external placement and routing work to ensure quality and schedule adherenceQualificationsBachelor's or Master's degree in Electrical Engineering, Electronics, or related field10+ years of relevant hardware engineering experienceProven experience designing networking hardware, particularly involving 100G/200G PAM4 Ethernet switchingDirect experience in high-speed optical transceiver PCB layout (800G and/or 1.6T preferred)Expertise with 112G / 224G PAM4 routing and channel optimizationAdvanced proficiency in Cadence Allegro and SigrityExperience designing 20+ layer boards with 50G+ signalsHands-on experience with sequential lamination, HDI, ultra-low-loss materialsExperience in multi-phase DC/DC layout for high-current, high transient loadsStrong manufacturing knowledge including DFM, DFA, and DFT for 30+ layer rigid and rigid-flex boardsDemonstrated success taking products from concept through mass productionCompensation InformationThe new hire base pay for this role has a salary range of $133,000 to $180,000. Arista offers different pay ranges based on work location, so that we can offer consistent and competitive pay appropriate to the market. The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location. The pay range provided reflects base pay only and in addition certain roles may also be eligible for discretionary Arista bonuses and equity. Employees in Sales roles are eligible to participate in Arista's Sales Incentive Plan, which pays commissions calculated as a percentage of eligible sales. US-based employees are also entitled to benefits including medical, dental, vision, wellbeing, tax savings and income protection. The recruiting team can share more details during the hiring process specific to the role and location.Additional InformationArista Networks is an equal opportunity employer. Arista makes all hiring and employment-related decisions in a non-discriminatory manner without regard to race, color, religion, sex, sexual orientation, gender identity, national origin or any other factor determined to be unlawful under applicable federal, state, or law law. All your information will be kept confidential according to EEO guidelines.