Senior ASIC Physical Verification Engineer
Annapurna Labs
Annapurna Labs (U.S.) Inc. is seeking an ASIC Physical Design Integration and Verification Engineer to drive full-chip floorplanning, integration, and physical verification. You will use Calibre, IC Validator, and PVS to ensure manufacturability and sign-off across advanced nodes, collaborating with layout and design teams and mentoring junior engineers. The role emphasizes strong problem-solving, industry-standard tool mastery, and a proactive approach to improving cloud-scale silicon in AWS #J-18808-Ljbffr
Vacancy posted 1 day ago
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