Principal Hardware Engineer - DSP

Arycs Technologies is a fast‑moving startup at the forefront of optical communications, building next‑generation optical modules that power AI, data centers, and cloud infrastructure. Our team is small but mighty—combining deep technical expertise with a bias for action. We believe in elegant engineering, rapid execution, and solving real‑world problems that move the industry forward. As we scale, we’re looking for exceptional people who thrive in highly technical, fast‑paced environments. About the Role As a Principal Hardware Engineer, Signal Processing, you will lead the design, analysis, and validation of advanced digital signal processing (DSP) algorithms and hardware architectures used in our next‑generation coherent and optical DSP‑enabled products. You will be responsible for developing DSP algorithmic models, optimizing signal chains, validating performance in hardware, and ensuring robust system behavior across diverse operating conditions. This position plays a critical role in defining DSP requirements, guiding hardware implementation, and driving cross‑functional design decisions that directly impact product performance and reliability. You will collaborate effectively with hardware, FPGA/ASIC, firmware, optical systems, and software engineering teams to deliver high‑performance, production‑ready DSP solutions. Note: Optical domain experience is not required for this role, but exposure to optical communications or coherent optics is beneficial. Responsibilities Architect, model, and simulate DSP algorithms for coherent and optical DSP systems. Define DSP hardware requirements and collaborate with ASIC/FPGA teams on implementation. Optimize DSP performance across noise, nonlinearity, phase impairments, and channel conditions. Develop end‑to‑end signal chains and system models (e.g., MATLAB, Python, C/C++). Validate DSP functional performance in lab hardware and system prototypes. System‑Level Analysis & Validation Lead system bring‑up, characterization, and debug for DSP‑enabled hardware modules. Perform performance validation, stability testing, and corner‑case analysis. Develop automated test frameworks and analysis tools using Python for DSP verification. Collaborate with firmware teams to ensure correct hardware/DSP interaction. Troubleshooting & Root Cause Analysis Lead deep‑dive investigations into complex signal impairments and system anomalies. Identify root‑cause issues across the signal chain (DSP, hardware, firmware, or integration). Provide guidance to cross‑functional teams during escalations and system debug cycles. Product Development & Technical Leadership Contribute to product definitions, architecture reviews, and system requirement documents. Provide technical oversight across DSP design, hardware architecture, and system integration. Mentor junior engineers and provide direction when group coordination is required. Present findings, technical recommendations, and design tradeoffs to internal stakeholders. Required Skills & Experience 10+ years of experience in DSP development, hardware signal processing, or related fields. Expertise in coherent DSP, optical DSP, or high‑performance communication with DSP algorithms. Strong background in modulation/demodulation techniques, equalization, FEC, timing recovery, phase recovery, adaptive filtering, and MIMO processing. Experience developing DSP simulations in MATLAB, Python, C/C++, or similar. Experience validating DSP behavior in hardware or FPGA/ASIC implementations. Strong understanding of high‑speed communication systems; optical experience is a plus. Proven ability to lead complex system debug efforts and drive cross‑functional collaboration. Excellent communication skills and the ability to clearly explain technical concepts. Nice to Have Knowledge of coherent optics, fiber impairments, or optical communication systems. Experience with pluggable modules, OIF/MSA standards, or high‑speed SerDes. Familiarity with hardware lab equipment (oscilloscopes, analyzers, BERT, etc.). #J-18808-Ljbffr Arycs Technologies, Inc.