Senior Verification Architect - SystemVerilog/UVM
Jobleads-US
Renesas Electronics is seeking a Principal Design Verification Engineer in Chandler, AZ to provide technical leadership for verification of next-generation memory interface products. This role will drive verification strategy and execution for complex digital designs, working closely with design teams to ensure functionality, performance, and product requirements are met.
The ideal candidate brings deep semiconductor verification expertise with SystemVerilog and UVM.
#J-18808-Ljbffr Jobleads-USVacancy posted 18 hours ago
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