Senior Analog & RF Layout Engineer
Capgemini
Capgemini is seeking an experienced Analog / RF Layout Designer to provide onsite support for advanced semiconductor nodes in San Francisco and Santa Clara. You will independently develop block-level and IP-level analog/RF layouts, drive floorplanning, placement, and routing, and lead top-level integration across SoCs. You will apply deep expertise in FinFET and deep sub-micron processes, addressing fabrication, EM, ESD, latch-up and reliability concerns while collaborating with global teams and #J-18808-Ljbffr Capgemini
Vacancy posted 1 day ago
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