Senior Engineer, Digital Design Engineering

Position Overview Senior Engineer, Digital Design Engineering at Analog Devices, Inc. (NASDAQ: ADI) – located in Somerset, New Jersey – is a full‑time role with a salary range of $127,171 – $175,440 per year (multiple openings). The position focuses on the development of state‑of‑the‑art analog, mixed‑signal, power, RF, and digital signal processing integrated circuits for a wide range of industries including healthcare, communications, aerospace and defense, instrumentation and emerging markets. The role supports cross‑functional teams throughout the entire product development lifecycle, from definition to release. Responsibilities Develop digital and mixed‑signal designs using Verilog RTL, standard cells, and other appropriate approaches for both ASIC and FPGA implementations. Apply formal design and verification techniques, including simulation, debugging, code coverage, and gate‑level simulations. Collaborate with analog design, systems design, firmware, and product engineering teams to resolve complex debugging and verification failures. Develop and execute test plans, and work with product, applications, and test engineers to meet performance and testability goals. Write user guides that define software setup and operating procedures. Run block and top‑level test benches to verify module integration. Document design work, present results, and participate in project meetings. Support partial telecommuting (2days per week). Qualifications Master’s degree in Electrical Engineering, Electronic Engineering, Computer Science, Computer Engineering, or a closely related field (foreign education equivalents accepted). At least 24 months of experience as a Digital Design Engineer or related role performing digital or mixed‑signal design and verification. Demonstrated expertise in digital design methodologies (RTL design, lint, CDC) and CAD tools (Cadence or Synopsis). Experience with simulation, synthesis, and CDC for digital/mixed‑signal products. Proficiency in verification languages and techniques (Verilog, SystemVerilog, assertion‑based and formal verification, pseudo‑random and constrained random, transaction‑level modeling). Participation in all phases of digital design development and tape‑out activities (architecture, debug, gate‑level simulations, evaluation). Benefits Discretionary performance‑based bonus. Medical, vision, and dental coverage. 401(k) plan. Paid vacation, holidays, and sick time. EEO Statement Analog Devices is an equal‑opportunity employer. We foster a culture where everyone has an opportunity to succeed irrespective of race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, political affiliation, or any other legally protected group. Notice of Applicant Rights Under the Law. #J-18808-Ljbffr 1010 Analog Devices Inc.