Senior Analog/RF Layout Engineer - End-to-End SoC Design
$97.7k - $203.8kCapgemini
Capgemini is looking for an experienced Analog / RF Layout Designer in Santa Clara, California. This role involves development of complex analog layouts and integration within larger SoCs, emphasizing multiple projects and collaboration. Candidates should have 6+ years of experience with SerDes, ADC/DAC layouts while working in advanced technologies. This position offers a competitive compensation range of $97,700 to $203,800 annually along with a comprehensive benefits package. #J-18808-Ljbffr Capgemini
Vacancy posted 4 days ago
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