Senior Staff Engineer, Diagnostics and AI San Diego, California, United States of America ASICS Engineering Posted 21 hours ago

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary

We are seeking a strategic, technically exceptional, and organizationally aware Senior Staff Engineer to help define the future of silicon Diagnostics, AI, and yield intelligence within Qualcomm's Yield Architecture and Engineering organization. This is an advanced research and development leadership role for an engineer who combines deep diagnostics expertise with systems thinking, AI innovation, and broad cross-functional influence.

Qualcomm develops technologies across a wide range of products and emerging markets, including AI accelerator platforms, advanced 3D integration, system-technology co-optimization, automotive, robotics, and next-generation wireless systems such as 6G. The Product and Process Services organization works at the leading edge of these challenges, often before the problem, ownership model, data, or solution path is fully defined. This role will help turn those unknowns into new diagnostic architectures, intelligent engineering systems, and scalable technical capabilities.

The charter is threefold. First, lead the architecture and evolution of silicon Diagnostics and yield intelligence for today's products and future technologies. Second, drive AI-enabled engineering transformation through practical applications of AI, agents, analytics, and automation. Third, provide strategic technical and organizational leadership by connecting Design, DFT, Product Engineering, Test Engineering, Failure Analysis, Yield Engineering, Automation, and AI teams around difficult cross-cutting problems and executable technical roadmaps.

This is not a conventional Diagnostics management role. The successful candidate will operate as a research and development leader with a specialty in Diagnostics, using technical vision, architecture, influence, governance, and mentoring to shape capabilities across organizational boundaries. The role requires curiosity, sound judgment, organizational responsibility, and the ability to create structure and momentum where established methods do not yet exist.

The Senior Staff Engineer will be based in the United States and will work closely with the Bangalore Diagnostics organization and its local leadership. This role provides global technical direction and cross-functional integration, while the Bangalore Director owns local organization building, talent development, operating discipline, and site execution.

Key Responsibilities

• 1. Diagnostics Architecture and Technical Strategy

  Define and evolve the architecture for Qualcomm's scan, memory, and emerging diagnostic capabilities. Connect readiness, execution, methodology, infrastructure, data, and learning across the silicon lifecycle while balancing immediate production requirements with long-term investment.

• 2. High-Volume, Production-Quality Diagnostics

  Provide technical leadership for reliable, scalable, high-volume, production-quality scan and memory diagnostics across Qualcomm's product portfolio. Establish standards and readiness criteria for quality, throughput, repeatability, and timely product enablement, and drive durable solutions to systemic gaps.

• 3. Advanced Technology and R&D Leadership

  Explore diagnostic and yield‑intelligence approaches for advanced 3D integration, system‑technology co‑optimization, AI accelerator products, automotive platforms, robotics, and next‑generation wireless systems. Anticipate how new architectures, packaging, workloads, and use conditions change observability, diagnosability, fault isolation, and learning. Convert uncertainty into research directions, prototypes, architectures, and scalable methods.

• 4. AI-Enabled Engineering Transformation

  Drive AI, agentic workflows, analytics, and automation across Diagnostics and adjacent yield workflows. Identify high‑value problems where AI can accelerate analysis, improve signal detection, preserve knowledge, support decisions, or redefine engineering work. Ground solutions in trustworthy data, scalable infrastructure, measurable outcomes, and sound governance.

• 5. Yield Intelligence and Cross‑Lifecycle Learning

  Connect Diagnostics, Failure Analysis, DFT, Product Engineering, Test Engineering, Design, manufacturing data, and yield learning. Develop evidence models that convert silicon findings into actionable learning and strengthen feedback and feedforward into diagnostic readiness, test, Design for Debug, and Design for Yield.

• 6. Leadership for Complex and Undefined Problems

  Lead problems where requirements, ownership, data, or solution paths are unclear. Frame the challenge, identify stakeholders and dependencies, define learning plans, develop options and tradeoffs, and establish a credible path forward for strategic priorities.

• 7. Cross‑Functional Technical Integration

  Create alignment across technical organizations, clarify interfaces, identify gaps, and establish shared objectives and evidence‑based decision frameworks. Influence outcomes through technical credibility, organizational awareness, structured communication, and collaborative problem solving.

• 8. Technical Governance and Execution Discipline

  Translate strategy into roadmaps, project plans, milestones, owners, decision rights, risks, dependencies, and success measures. Establish focused technical reviews and operating mechanisms that improve decisions and predictable execution without unnecessary bureaucracy.

• 9. Partnership with the Bangalore Diagnostics Organization

  Provide global technical direction in close partnership with Bangalore leadership. Define priorities, architectures, capability roadmaps, and standards while enabling increasing technical ownership and self‑reliance. Support knowledge transfer and senior technical leadership development without replacing the Bangalore Director's local people and site accountabilities.

• 10. Technical Capability and Community Building

  Build a technical community across Diagnostics, AI, Automation, and partner disciplines. Promote reusable solutions, shared methods, documented architectures, searchable knowledge, common evidence models, and systematic knowledge transfer across products and locations.

• 11. Mentoring and Leadership Development

  Mentor engineers and emerging leaders in systems thinking, technical judgment, communication, planning, and cross‑functional leadership. Delegate meaningful ownership and model the organizational responsibility and technical integrity expected from senior YAE leaders.

• 12. Diagnostics and AI Innovation Roadmap

  Maintain a forward‑looking roadmap covering capabilities, data foundations, partnerships, methods, infrastructure, and skills required for more intelligent and scalable diagnostic systems. Balance experimentation with production readiness, sustainability, integration, and engineering value.

• 13. Broader AI Adoption and Technical Enablement

  Strengthen responsible AI adoption across YAE and PPS by sharing repeatable practices, technical patterns, successful use cases, and lessons learned. Partner with AI platform, software, data, and engineering communities to enable practical, outcome‑driven adoption.

• 14. Strategic Planning and Organizational Insight

  Advise YAE leadership on technical needs, capability gaps, dependencies, investments, staffing, skills, infrastructure, partnerships, and sequencing. Recognize and help resolve organizational barriers such as unclear ownership, fragmented workflows, and missing governance.

• 15. Executive and Senior Technical Communication

  Communicate complex strategies, decisions, risks, and recommendations clearly to engineers, senior technical leaders, and executives. Present context, evidence, alternatives, tradeoffs, and recommendations with accuracy and transparency.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Preferred Qualifications

• 1. Education

  Bachelor's or advanced degree in Electrical Engineering, Computer Engineering, Computer Science, Data Science, or a related field.

• 2. Semiconductor Engineering Experience

  12+ years of semiconductor engineering experience, including significant work in ATPG or memory diagnostics, DFT, silicon debug, product or test engineering, yield analysis, Failure Analysis, Design for Debug, Design for Yield, or post‑silicon engineering.

• 3. Diagnostics Technical Depth

  Deep understanding of diagnostic concepts, methods, workflows, data, or infrastructure, with demonstrated ability to lead strategy or architecture for complex post‑silicon capabilities.

• 4. AI, Automation, or Data Systems

  Experience architecting or scaling automation, analytics, machine learning, generative AI, agentic systems, data platforms, or intelligent engineering workflows in a technically complex domain.

• 5. Advanced Technology Curiosity

  Ability to learn unfamiliar technologies quickly, identify implications for Diagnostics and yield learning, and formulate research or architecture directions before established solutions exist.

• 6. Systems and Architecture Mindset

  Ability to understand complex systems across lifecycle and organizational boundaries, distinguish local optimization from system outcomes, and design for reuse, learning, scale, and evolution.

• 7. Strategic Technical Leadership

  Experience defining strategy, roadmaps, and architectures and leading major initiatives spanning multiple teams or functions.

• 8. Leadership Through Influence

  Demonstrated ability to build alignment, resolve unclear ownership, influence decisions, and sustain execution without relying on direct reporting authority.

• 9. Organizational Awareness and Responsibility

  Ability to understand stakeholders, dependencies, decision rights, operating mechanisms, capability gaps, and competing priorities, and to take responsibility for shared outcomes.

• 10. Governance and Operational Discipline

  Experience with project plans, architecture reviews, roadmaps, metrics, risk management, decision frameworks, ownership models, and escalation paths.

• 11. Leadership Under Ambiguity

  Success framing and solving problems where requirements, approaches, data, ownership, or success criteria were initially unclear.

• 12. Cross‑Functional Partnership

  Strong partnership across Design, DFT, Product Engineering, Test Engineering, Failure Analysis, Yield Engineering, software, data, Automation, or AI.

• 13. Global Technical Leadership

  Experience leading across geographic, functional, and cultural boundaries and developing technical ownership in distributed teams.

• 14. Mentoring and Talent Development

  Demonstrated ability to mentor engineers, develop technical leaders, delegate ownership, and raise broader organizational capability.

• 15. Communication and Executive Presence

  Excellent written and verbal communication and the ability to present evidence‑based recommendations to technical and executive audiences.

• 16. Innovation with Execution

  Ability to convert innovative ideas into working capabilities, scalable methods, or sustained practices while balancing speed, rigor, production readiness, and architectural quality.

• 17. Community Builder

  Ability to connect technical communities, encourage knowledge exchange, and build shared purpose across evolving environments.

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Pay range and Other Compensation & Benefits

$164,000.00 - $246,000.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.