DRAM Layout Engineer - Driving Innovative Block Design

Micron Technology in Boise, Idaho, is seeking a Layout Engineer to shape block-level layouts and guide physical design strategy. In this hands-on role, you will influence the quality and reliability of DRAM products while collaborating closely across global teams. The ideal candidate will have experience in Cadence Virtuoso and familiarity with DRC, LVS, and reliability checks. Micron offers comprehensive benefits including health plans, income protection, and paid time-off programs. #J-18808-Ljbffr