Senior Technical Program Manager - Silicon Co-Design
$168k - $258.75kNVIDIA
Join NVIDIA, a trailblazer at the forefront of graphics and artificial intelligence performance, efficiency, and innovation. From our roots as a groundbreaking graphics company, we have evolved into a global leader in artificial intelligence, continuously pushing the boundaries to address sophisticated challenges across diverse industries. NVIDIA's Silicon Co-Design Group (SCG) sits at the intersection of architecture, silicon, systems, and manufacturing — where engineering judgment at the highest level drives real-world product outcomes at scale. This is not a coordination role. It is an ownership role.We are looking for a Senior TPM who has left a visible mark on programs: someone whose decisions changed schedules, prevented crises, and improved the next program. You own program outcomes across multiple programs — from architecture engagement through tape-out and silicon correlation — and carry ambiguous multi-team problems to closure, creating methods others adopt. You have enough engineering literacy to understand the tradeoffs, sense where risk is forming, and steer engineering to deliver — and the maturity to create order under ambiguity and high visibility. You improve the system after every program, not just report on it. The exceptional hire also uses AI deliberately, not as a credential, but as a force multiplier with demonstrated workflow impact.What you'll be doing:Program outcomes, end-to-end. Lead the schedule, achievements, dependencies, and delivery commitments throughout several programs, from architecture engagement through tape-out and silicon correlation.Manage schedule headroom and surface resource crunches early. Accountable for delivery, not only oversight.Prioritization and steering. Prioritize and steer the engineering team on schedule — sequencing work, unblocking paths, and making the day-to-day calls that keep each program moving — and enable teams to run faster with less oversight over time.Cross-boundary alignment. Act as the primary alignment layer across silicon, systems, software, operations, and product. Catch misalignments before they hurt the program, and drive alignment across challenging priorities and resistant teams without leaning on a blocking issue as your first move. Risk translation and management of critical issues. Sense where risk is concentrating across engineering boundaries and look around corners to catch it early. Uplevel technical risk into decision-ready options for leadership and advance with the right framing at the right time.Durable process improvement. Identify where execution broke down — dependency blind spots, achievement gaps, cross-team handoff failures — and evolve the operating model so each successor program runs better than the last. Set a higher standard for the program managers around you.What we need to see:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent experience); a master's is a plus.10+ years in technical or engineering organizations, with at least 5 years in program management owning multiple complex programs concurrently — ideally in semiconductor, hardware, or complex systems engineering.Working understanding of silicon design cycles, verification, and productization — enough to understand the tradeoffs, steer engineering, sense where risk is forming, and frame the problem so the right expert can act.Ability to work across the silicon–system–software boundary — enough depth to spot integration risks and drive resolution without having to be the expert on every question.Proven track record driving fast development cycles under uncertainty, high visibility, and organizational resistance, you create order out of ambiguity and generate transparency rather than wait for it.Analytical capability — you quantify risk, build program-health metrics that predict slip early, and use data to surface what others miss.Uses AI deliberately, not as a credential, but as a force multiplier with demonstrated workflow impact.Communication that is precise, direct, and right-sized for the audience.Ways to stand out from the crowd:You came from engineering and read the technical landscape, not just the schedule, and use that literacy to steer engineering and sense risk.Built a program execution model or methodology from the ground up that is still in use after you moved on.Used AI-powered program management tools in production — automated status, risk flagging, dependency tracking — and can tell specifically which improvements outweigh the added noise.NVIDIA is widely considered one of the most desirable employers in the technology world. We have some of the most forward-thinking and hardworking people in the world working for us. If you own program outcomes others depend on, sense risk before it becomes a crisis, and leave systems better than you found them, we want to hear from you.#LI-HybridYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 258,750 USD for Level 4, and 200,000 USD - 322,000 USD for Level 5.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until August 1, 2026.This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.SummaryLocation: US, CA, Santa Clara; US, TX, AustinType: Full time
$163k - $237k
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