Timing Design Engineer
Apple Inc.
Apple is where individual imaginations come together, committing to the values that lead to great work. Every new product we build, service we create, or Apple Store experience we deliver is the result of us making each other’s ideas stronger. That happens because every one of us shares a belief that we can make something wonderful and share it with the world, changing lives for the better. It’s the diversity of our people and their thinking that encourages the innovation that runs through everything we do. When we bring everybody in, we can do the best work of our lives. Here, you’ll do more than join something — you’ll add something. Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing. Key responsibilities include timing sign-off, STA and sign-off flow development, ownership of IP and block level timing constraints both for regular and custom timing requirements from synthesis to sign-off to achieve sign-off quality timing constraints. You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You will also come up with ideas and plans to verify your own timing constraints. You will innovate timing constraints and flow to facilitate timing closure and any potential pessimism or fall outs in timing analysis. Minimum Qualifications Bachelors of Science in Electrical Engineering. Preferred Qualifications Proven knowledge of the ASIC design timing closure flow and methodology. 2+ years of experience in writing ASIC timing constraints and timing closure. Expertise in STA tools (Primetime) and flow, knowledge of timing corners/modes, process variations and signal integrity related issues. Hands on experience in timing/SDC constraints generation and management. Proficient in scripting languages (Tcl and Perl). Familiarity with synthesis, DFT and backend related methodology and tools. Strong communication skills are a pre‑requisite – you will be collaborating with many diverse groups at Apple. The ideal candidate will be a self‑starter and highly motivated to be successful at Apple. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong. Learn about accessibility in Apple’s workplace Learn about reasonable accommodations for job applicants Apple accepts applications to this posting on an ongoing basis. #J-18808-Ljbffr Apple Inc.
$136k - $218.5k
...join the team and see how you can make a lasting impact on the world.We are now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great, join us today!...SuggestedFull time- ...product! In this role, you will be responsible for all aspects of timing including working with the implementation and RTL teams on... ...timing analysis, and timing closure. Description As a CPU Design Timing Engineer, you will be responsible for the timing closure of the...Suggested
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$178.85k - $218.59k
...tomorrow across every market segment of chip design, including artificial intelligence,... ...world a better place, one processor at a time. Are you ready? To learn more about SiFive... ...:The Role:SiFive is looking for hardware engineers who are passionate about designing industry...Full timeWork experience placementFlexible hours$164.47k - $269.1k
...Details:Job Description: About the RoleJoin Intel’s CPU Design Team within the Silicon & Platform Engineering (SPE) Group, where you will help architect and... ...circuits, and arrays.Familiarity with circuit planning and timing convergence processes.Ability to leverage broad...Full timeLocal areaImmediate startShift work$122.44k - $232.19k
...future with you.The TeamYou’ll join Intel’s All Cores Engineering (ACE) organization, the team responsible for designing and delivering Intel’s industry‑leading CPU cores... ...work model which allows employees to split their time between working on-site at their assigned Intel...Full timeLocal areaImmediate startShift work$157.3k - $212.8k
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We are now looking for an ASIC Design Efficiency Engineer! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators... ...any other characteristic protected by law.SummaryLocation: US, CA, Santa Clara; US, TX, Austin; US, NC, DurhamType: Full timeFull time$100k
...of all seniorities.Tenstorrent is seeking talented Physical Design Engineers to implement high-performance partitions for an industry-leading... ...close AI SoC partitions end-to-end, including power intent, timing, and physical signoff in a modern Synopsys-based flow.Deeper...Permanent employment- ...Together, we advance your career. THE ROLE:As a CPU Core RTL Design Engineer, you will help design and optimize next-generation high-performance... ..., along with the ability to balance performance, power, and timing considerations in modern processor design.KEY...
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$122.44k - $232.19k
...motivated and experienced individual to join our team as a CPU Memory Design Engineer. In this role, you will be responsible for designing,... ...for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-...Full timeLocal areaImmediate startShift work- Position:ASIC Design Engineer (eInfochips)Job Description:Role: Asic Design EngineerLocation: Mountain View CA (Remote)Note: Seeking candidate... ...Proficiency in clock crossing techniques.Knowledge of Static Timing Analysis and understanding of timing signoff fundamentals....Full timeWork at officeRemote work
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$138k - $197k
Execute block-level physical design implementation from synthesis, Place and Route and... ...via signoff checks.Analyze and resolve timing, congestion, and power issues to achieve... ...qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,...Worldwide$141.91k - $200.34k
Job Details:Job Description: The Role and ImpactAs a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-... ...designedOptimize logic designs to meet power, performance, area, and timing goals using advanced tools and strategiesConduct quality...Full timeLocal areaImmediate startWorldwideShift workNight shift$141.91k - $269.1k
...better brings. We work every single day to design and manufacture silicon products that... ...verification (PV) methodology and circuit / timing quality signoff for the CPU team.... ...Masters & 4+ years in Electrical & Computer Engineering, Computer Engineering, Electrical...Full timeInternshipLocal areaImmediate startShift work$100k
....Tenstorrent is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our complex AI and CPU System... ...implementation, and multi-voltage domain designs.Mastery of timing closure, EM/IR analysis, and physical verification at the...Permanent employment- ...brilliant people to do brilliant things in engineering, management, and development services,... ...our core sectors.We are seeking a Track Design Engineer to join our team in Austin, Texas... ...solving skillsAdditional Information:Full-time Austin-based position Relocation support...Full timeTemporary workFor contractorsWork at officeLocal areaWorldwideRelocation package3 days per week
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$100k - $140k
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