Senior Memory Verification Architect (DDR6, SV/UVM)
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Renesas Electronics is seeking a Senior Staff Design Verification Engineer to provide technical leadership for verification of memory interface products used in data center, AI, and cloud applications. The role focuses on DDR6 and future generations, with expert use of SystemVerilog and UVM.
The ideal candidate has 10+ years in semiconductor verification, can drive verification strategies, and mentor engineers.
#J-18808-Ljbffr Jobleads-USVacancy posted 1 day ago
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