Senior RTL Design Engineer - DDR/LPDDR Memory Controller

AMD in Austin, TX, is seeking an RTL Design Engineer to join the Memory Controller Design team. You will contribute to IP microarchitecture features and develop RTL for IP blocks with focus on power, performance, and area optimization. You will collaborate with architects and verification engineers across global teams, perform lint, CDC, timing analysis, and participate in design and code reviews to ensure high-quality IP implementations in a fast-paced engineering environment. #J-18808-Ljbffr