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Device Characterization & Modeling Engineer (SPICE)

$210k

Top Echelon

Job Description

Job Description

This job is posted on behalf of Steinman Recruiting Associates by Top Echelon.

We seek proven Device Characterization & Modeling (SPICE) talent for an Austin client.

A leading global supplier of low-power, high-precision mixed-signal processing solutions. World-class innovators that are hyper-specialized offering game-changing microchips that captivate billions of global users every single day. This client dominates by tightly integrating three core pillars: Ultra-Low-Power, High-Precision Analog Architecture; Patented Hardware-Software Co-Design; and co-developing custom silicon directly with top-tier OEMs.

You will: Have deep expertise in device characterization, test‑chip design, SPICE modeling, and device‑level reliability … Own device lab operations, ensuring equipment is optimized and running flawlessly … Perform a broad range of silicon device characterization, extract accurate SPICE and aging models, and help shape the foundation of our next‑generation semiconductor technologies.

If you thrive at the intersection of hands‑on lab work, modeling, and silicon physics, this is your opportunity to make a direct impact on device performance and long‑term reliability.

What will get our attention:

- PhD/MS with current industry experience in semiconductor device modeling and characterization.

- Expertise in SPICE model generation, validation, and QA flow.

- Strong device physics.

- Physics of device aging and long‑term reliability mechanisms.

- Hands‑on deep‑submicron CMOS and BCD device measurements

- Hands-on manual, semi‑automatic, and fully automatic probers

- Able to design test structures (individual devices and arrays) for silicon characterization.

- Knowledge of both active and passive device structures in CMOS and BCD process technologies.

- Solid understanding of device noise, mismatch behavior, and how these impact circuit‑level performance.

- Coding ability in Python, Perl, or similar scripting languages

Highly Desirable:

- Experience running simulations in Cadence ADE

- Exposure to digital and analog design flows and broader design methodologies.

- Ability to stress‑test devices to evaluate post‑stress behavior and safe‑operating‑area (SOA) limits.

Title: Engineer (mid to senior career)

Worksite: Austin, Texas (hybrid). Full relocation package.

Compensation: Base salaries to ~$210,000 DOE. Additional lucrative bonus (s) and RSUs offered. Comprehensive benefits.

Current USA H-1B visa holders and those TN eligible are encouraged to apply.

Vacancy posted 6 days ago
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