ASIC & FPGA Design Engineer Stf - E4

Requisition ID: 14259ERP Eligible?: YesRelocation: PossibleType: ExemptShift: 1Clearance Prior to Start: Interim SecretFinal Clearance: SecretPay Transparency: $135,700.00 - $251,900.00Experience Level: Experienced ProfessionalFT/PT/Casual: FullTimeDepartment: MFC-ChelmsfordBusiness Unit: MFC-ChelmsfordBasic QualificationsBachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined educationHDL programming experience with VHDL, Verilog, and/or System Verilog.Experience in Hardware-Software Integration and Validation.Experience with Xilinx FPGAs and related toolsets such as Vivado.Experience with FPGA simulation tools and languages such as Synopsys VCS and SystemVerilog.Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity.Extensive experience with troubleshooting designs and resolving integration issues.Excellent communication and presentation skills.Candidate must be eligible to obtain a Secret Clearance and be able to obtain at least an Interim Secret Clearance before starting the position, therefore you must be a US Citizen.Desired SkillsMaster of Science Degree in Electrical Engineering or closely related technical field.Active DoD Secret or Top Secret ClearanceSignificant relevant experience in the defense electronics industry, including FPGA development for RF systems.Experience with version control systems, such as GitExperience with multiple FPGA vendors, such as Altera or MicrochipKnowledge of software programming languages, such as C, C++, or PythonExperience with debugging and troubleshooting complex digital systemsKnowledge of UVM and experience with UVM-based verification methodologiesExperience with the MFC DAR processExperience with Missile systemsExperience with Missile SafetyExtensive experience with troubleshooting designs and resolving integration issues in a production or manufacturing environment.Expertise with datalink or T/R module architecture.Expertise with technical documentation such as specifications, schematic drawings, and test data.Experience with customer interface including technical presentations.Ability to lead failure investigations on production and/or technical issues.Ability work in a team collaborative environment especially with manufacturing and industrial engineers and/or operator on production support.Pay InformationFull-Time Salary Range: $135700.00 - $251900.00At Lockheed Martin, we know mission success starts with taking care of our people. Our Total Rewards program is designed to attract top talent, support your well-being, and help you grow—both professionally and personally.The salary range for this position is as listed on the requisition. Please note that the salary information listed is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market(work location) and business considerations when extending an offer. Benefits offered: Medical, Dental, Vision, Flexible work arrangements and schedules (e.g., 4x10), 401(k) match, Paid time off, Holidays, Parental Leave, EAP, Flexible Spending Accounts, Education Assistance, Life Insurance, Short-Term Disability, and Long-Term Disability.Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.For (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.