Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Principal RFIC Design Engineer - Chip Lead

Oso Semiconductor Inc.

We’re looking for a Principal RFIC Design Engineer - Chip Lead to own top-level integration of our next-generation multi-channel beamformer ICs. You’ll drive chip architecture, floorplanning, block integration, top-level RF/analog performance, physical implementation, package interfaces, and tapeout readiness across RF, analog, digital, layout, and test functions.

This is a senior technical leadership role for an experienced IC designer who can see the whole chip. You’ll work directly with the founding engineers and block owners to turn system requirements into a manufacturable, testable product and drive execution from architecture and floorplan through sign-off, silicon bring-up, and customer deployment.

#J-18808-Ljbffr

Vacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the Principal RFIC Design Engineer - Chip Lead in Mountain View, CA vacancy
  •  ...Founded by UC Berkeley PhDs, our proprietary RFIC architecture delivers 2–4x power...  ...Role We're looking for a Staff RFIC Design Engineer to join the core design team. You'll design...  ...blocks for our next-generation beamformer chips—including LNAs, PAs, phase shifters,... 
    Principal
    Work at office
    Flexible hours

    Oso Semiconductor Inc.

    Mountain View, CA
    3 days ago
  •  ...We're looking for a Principal RFIC Design Engineer - Power Amplifier Specialist to join the core design team. You'll own the design, simulation, layout, and validation of high-efficiency mmWave power amplifiers and associated transmit-chain circuitry for our next-generation... 
    Principal

    Oso Semiconductor Inc.

    Mountain View, CA
    1 day ago
  • Oso Semiconductor Inc. in Mountain View, CA, is seeking a Principal RFIC Design Engineer - Chip Lead to own top-level integration of our next-generation multi-channel beamformer ICs. You’ll drive chip architecture, floorplanning, block integration, RF/analog performance... 
    Suggested

    Oso Semiconductor Inc.

    Mountain View, CA
    4 days ago
  • Oso Semiconductor Inc. seeks a Principal RFIC Design Engineer - Power Amplifier Specialist to own the design, simulation, layout and validation of high-efficiency mmWave power amplifiers. You will work directly with the founding engineers on PA architecture, efficiency... 
    Principal

    Oso Semiconductor Inc.

    Mountain View, CA
    2 days ago
  • $175k - $280k

     ..., with the ultimate goal of enabling human life on Mars.SR. RFIC DESIGN ENGINEER (RFIC ENGINEERING)At SpaceX we’re leveraging our experience...  ...in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been... 
    Suggested
    Permanent employment
    Temporary work
    Worldwide
    Weekend work

    SpaceX

    Palo Alto, CA
    4 days ago
  • $213k - $287.5k

     ...Come work at Amazon! The Role:As Senior RFIC Design Engineer, you will engage with an experienced...  ...communications systems, digital design, and chip implementation teams to specify and...  ...will delight future Kuiper customers. • Lead implementation of area/power-efficient... 
    Permanent employment
    Local area
    Flexible hours
    Shift work

    Amazon

    Sunnyvale, CA
    3 days ago
  •  ...with the ultimate goal of enabling human life on Mars. SR. RFIC DESIGN ENGINEER (RFIC ENGINEERING) At SpaceX we’re leveraging our...  ...in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been... 
    Permanent employment
    Worldwide
    Weekend work

    SPACE EXPLORATION TECHNOLOGIES CORP

    Palo Alto, CA
    1 day ago
  • $150.4k - $277.6k

     ...elements into a single, coordinated design. Join us, and you’ll help us...  ...Description The wireless RFIC team architects, designs, and...  ...vertically integrated engineering team spanning RF/Analog architecture...  ...of the wireless connectivity chip throughout productization.... 
    Worldwide
    Relocation

    Apple Inc.

    Sunnyvale, CA
    16 hours ago
  •  ...That’s where we come in. We combine deep engineering expertise with global-scale...  ...DescriptionESSENTIAL DUTIES AND RESPONSIBILITIES:Designer will be responsible for the design of high...  ...planning, block level routing and top level chip routingKnowledge of high performance and... 
    Principal
    Temporary work
    Immediate start
    Remote work
    Worldwide
    Flexible hours
    Shift work

    Western Digital

    San Jose, CA
    3 days ago
  • Entrada Ventures in Palo Alto seeks a Principal Physical Design Engineer to join as an early member of our physical design team. You will own challenging physical implementation problems from floorplan through signoff, driving performance, power, and timing targets while... 
    Principal

    Entrada Ventures

    Palo Alto, CA
    3 days ago
  • Delos Data is seeking a Principal Physical Design Engineer to join as an early member of the team in Silicon Valley. You will own complex physical implementations...  ..., power integrity, and robust PPA improvements. You will lead cross-functional collaboration with RTL, architecture,... 
    Principal

    Delos Data

    Palo Alto, CA
    2 days ago
  • $232k - $368k

    The Silicon Co-Design Group (SCG) sits at the crossroads...  ...functions to deliver chips that change what is...  ...Group is hiring a Chip Lead to serve as the technical...  ...Electrical or Computer Engineering, plus over a decade of...  ...Project Tech Lead, or Principal or Distinguished Engineer... 
    Principal
    Full time

    Nvidia

    Santa Clara, CA
    3 days ago
  • $170k - $235k

     ...of enabling human life on Mars. SR. RF FRONT-END MODULE DESIGN ENGINEER (RFIC ENGINEERING) At SpaceX we're leveraging our experience in...  ...production, measurement, debug, and optimization of compact, multi-chip modules (MCMs) containing custom RF front-end components.... 
    Temporary work
    Worldwide
    Weekend work

    SpaceX

    Sunnyvale, CA
    4 days ago
  • $180.64k - $261.58k

     ....PrincipalPowerICChipLeadExpand your design expertise in high-performance power management...  ...applications. We are seeking a Principal Power IC Chip Lead to spearhead the development of our...  ...:MS or PhD in Electrical Engineering with 12+ years' experience in Power IC... 
    Principal
    Permanent employment
    Full time
    Work at office
    Day shift

    Analog Devices

    Milpitas, CA
    6 days ago
  • $182.36k - $273.2k

     ...a place to thrive, learn, and lead. Your Team, Your ImpactMarvell...  ...semiconductor technology, developing chips in TSMC advanced process nodes. We are a global, multi-site engineering organization spanning Santa...  ...progress across all hardware design phases from POR (Plan of... 
    Principal
    Permanent employment
    Full time
    Work from home

    Marvell

    Santa Clara, CA
    5 days ago
  • $175k - $280k

     ...goal of enabling human life on Mars. SR. SILICON PHOTONICS DESIGN ENGINEER (RFIC ENGINEERING) At SpaceX we’re leveraging our experience in building...  ...in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has not previously... 
    Permanent employment
    Temporary work
    Worldwide
    Weekend work

    Starlink

    Palo Alto, CA
    5 days ago
  • RFIC Design Engineer w/Power AmplifierCandidate will be part of a multi-discipline team developing PA, RF switches and front-end modules for the...  ...:Relevant experiences in PA, RF switches design or multi-chip module (MCM) design including filter and matching networks to... 

    MoTek Technologies

    San Jose, CA
    6 days ago
  • Job Description:Design cost effective controller with high performance...  ...with multi-nation teams in leading-edge process node and be...  ...Master Degree in Electrical Engineering, Computer Science or Computer...  ...architecture. - Familiarity with chip digital design flow,... 
    Principal
    Work experience placement

    Baidu

    Sunnyvale, CA
    2 days ago
  •  ...Lab focused on building self-improving systems, starting with chip design. We are reinventing chip development and closing the loop between...  ...To close the loop between our AI and real silicon, we need an engineer who knows every step of the flow cold, from synthesis through... 

    Ricursive

    Palo Alto, CA
    1 day ago
  • Amazon Kuiper Manufacturing Enterprises LLC is seeking an RFIC Design Engineer in Sunnyvale, CA to architect, simulate, lay out, and optimize front...  ...transceivers from data converters to LNAs and PAs. You will lead area- and power-efficient RFIC implementations across... 

    Amazon Inc.

    Sunnyvale, CA
    4 days ago
  • $174k - $352.5k

    ## Principal ASIC Design EngineerApplylocations: Sunnyvale, California, United...  ...significant project/program work. Leads or participates in cross-...  ...high performance networking chips.* Write detailed functional...  ...to new college-grad/junior engineers and interns.**Recommended... 
    Principal
    Work experience placement
    Work at office
    2 days per week

    Hewlett Packard Enterprise

    Sunnyvale, CA
    5 days ago
  •  ...seeking an experienced VLSI/ASIC architect to design and verify complex networking chip subsystems. You will write both functional...  ...with verification and physical design teams, lead major modules, and mentor junior engineers while maintaining high standards in performance... 
    Principal

    HP Enterprise

    Sunnyvale, CA
    3 days ago
  • $210k - $355k

     ..., with the ultimate goal of enabling human life on Mars.PRINCIPAL DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING)At SpaceX we’re leveraging our experience...  ...and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously... 
    Principal
    Permanent employment
    Temporary work
    Worldwide
    Weekend work

    SpaceX

    Palo Alto, CA
    2 days ago
  • $142.8k - $274.8k

     ...Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft...  ...Engineering (AISiE) SoC Design Verification team is seeking...  ....  We are looking for a Principal Design Verification Engineer...  ...functional verification at the block, chip and system level, reference... 
    Principal
    Ongoing contract
    Permanent employment
    Work at office
    Local area
    Worldwide
    3 days per week

    Microsoft

    Mountain View, CA
    1 day ago
  • SpaceX is seeking a Sr RFIC Design Engineer (RFIC Engineering) to develop cutting-edge RF/analog/mixed-signal ICs for Starlink and space applications. You will collaborate with cross-functional teams to define specifications, simulate designs, and ensure reliable operation... 

    SPACE EXPLORATION TECHNOLOGIES CORP

    Palo Alto, CA
    5 days ago
  • SpaceX is seeking a Sr Silicon Photonics Design Engineer (RFIC Engineering) to develop next‑generation PICs for Starlink ground and space infrastructure. You will design, simulate, and validate optical building blocks and interfaces, partnering with systems, DSP, and ASIC... 

    Starlink

    Palo Alto, CA
    5 days ago
  • SpaceX is seeking a Senior RFIC Design Engineer to join the RFIC Engineering team. You will design, simulate and develop RF/Analog ICs for Starlink and aerospace applications, working with cross‑functional teams across systems, firmware and ASIC groups. You will translate... 

    SpaceX

    Palo Alto, CA
    2 days ago
  • Designs, analyzes, develops, modifies and evaluates VLSI components...  ...significant project/program work Leads or participates in cross-...  ...in high performance networking chips Write detailed functional as well...  ...to new college-grad/junior engineers and interns Benefits Recognition... 
    Principal
    Work experience placement
    Flexible hours

    HP Enterprise

    Sunnyvale, CA
    3 days ago
  • $207k - $230k

     ...more at As an Astera Labs STA Physical Design Engineer, Senior Principa l you will play a...  ...connectivity ASICs used in the world's leading cloud service providers, server and network...  ...verification teams to ensure robust full-chip signoff. This role is fully on-site and... 
    Principal
    Flexible hours

    Astera Labs

    San Jose, CA
    1 day ago
  • Entrada Ventures in Mountain View, CA is seeking a Principal RFIC Design Engineer - Power Amplifier Specialist to lead the design, simulation, layout, and validation of high-efficiency mmWave power amplifiers for next-generation beamformer ICs. This senior role offers deep... 
    Principal

    Entrada Ventures

    Mountain View, CA
    2 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Principal RFIC Design Engineer - Chip Lead. Be the first to apply!