Package Design Methodology Engineer
$136k - $218.5kNVIDIA
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.NVIDIA's Advanced Package Engineering team sits at the intersection of cutting-edge chip design and the physical reality of getting silicon to product — and we're expanding it. As AI systems grow more complex, NVIDIA's multi-die packages have become some of the most challenging engineered products, connecting dozens of chiplets across substrates, interposers, and heterogeneous interfaces. The engineers who build the automation infrastructure for these packages don't just write software — they directly determine whether NVIDIA can tape out on schedule and at scale. This role is a rare opportunity to craft production-grade EDA tooling that operates at the bleeding edge of packaging technology, where no commercial solution exists yet and the problems you solve become the new industry baseline. If you want develop design flows for NVIDIA's next-generation AI and HPC platform packages, this is that job.What you'll be doing:Work with world-class engineers to design and implement VLSI tools for silicon and substrate design.Develop applications to enable project engineers with an emphasis on maintainability and ease of use.Develop flows/tools and methodologies to construct, analyze, and validate package designs at many different stages in the production flow.Optimize the daily workflows of the world's top package designers.What we need to see:BS in Computer Science, Electrical Engineering, or a related field (or equivalent experience), and 5+ years of flow and methodology development experience building flows for package design used by engineering teams at scale.Good programming fundamentals in Python and/or C++, including proficiency with data structures, algorithms, object-oriented design, and code quality practices.Demonstrated experience applying AI/ML techniques in engineering workflows — this could include using LLMs for code generation and debugging, building ML-assisted design analysis tools, or integrating AI-assisted flows into EDA environments.Strong understanding of electrical engineering fundamentals relevant to VLSI package design (signal integrity, power delivery, parasitic extraction, or equivalent).Ways to stand out from the crowd:Good understanding of VLSI package design along with interposer and IC physical design.Strong expertise in developing package design flows and methodologies.NVIDIA is widely considered to be the leader of AI computing, and one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you.Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until July 31, 2026.This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.SummaryLocation: US, CA, Santa Clara; US, TX, Austin; US, CA, RemoteType: Full time
$168k - $264.5k
We are now looking for a Senior CPU Design Methodology Engineer! The complexity of chip development has greatly increased over the years. We are... ...interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams. What You'll Be...Suggested$100k
...much by flow maturity as by design work. This role develops, deploys... ..., and owns the RTL-to-GDSII methodology the IP physical design team... ...physical design or CAD methodology engineer who has built flows that... ...competitive compensation package and benefits, and we are an equal...SuggestedPermanent employment$183k - $247.6k
...Machine Learning Acceleration (MLA) team designs and develops the SOCs that power... ...worldwide. As an ASIC Design Methodologies and Infrastructure Engineer, you'll play a foundational role in... ...position is listed below. Your Amazon package will include sign-on payments and restricted...SuggestedLocal areaWorldwideFlexible hours- ...strategic AI/Datacenter Infrastructure Power package engineering and new product introduction (NPI)... ...product group partners—especially Design, Application, and Marketing teams—Product... ..., and structured problem-solving methodologies. ~ Exceptional program management...SuggestedFull time
$163k - $237k
Low Power Design Methodology and Optimization Engineer Google Austin, TX, USA Mid Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area. Minimum qualifications: Bachelor's degree...SuggestedFull timeWorldwide- ...philosophy extends beyond the product to its packaging, where every detail is thoughtfully... ...diverse group of people responsible for the design and execution of structural packaging... ...degree with an emphasis in Mechanical Engineering or Packaging ScienceExperience working with...
- NVIDIA's Advanced Package Engineering team seeks a skilled engineer to design and implement VLSI tools for silicon and substrate design, collaborating with industry-leading engineers in a production environment. You will develop applications and flows to enable project...
- ...leading technology company based in Austin, Texas is seeking a packaging design professional to create innovative and sustainable packaging... ...standards. Candidates should have a BS degree in Mechanical Engineering or Packaging Science, along with 3 years of relevant...
- Apple’s Packaging PD team is responsible for the design and execution of structural packaging for all Apple products, from shippers to finished goods boxes. We collaborate with Industrial Design, Marketing, Environmental, Operations and many others to deliver packaging...
- ...philosophy extends beyond the product to its packaging, where every detail is thoughtfully... ...diverse group of people responsible for the design and execution of structural packaging... ...degree with an emphasis in Mechanical Engineering or Packaging Science Experience working...
- ...with the ultimate goal of enabling human life on Mars.SR. IC PACKAGE DESIGN ENGINEER (SILICON ENGINEERING)At SpaceX we’re leveraging our... ...power integrity and RF performance of the package designDrive methodology, innovations, and productivity improvements in package designBASIC...Permanent employmentWorldwideWeekend work
- NVIDIA is seeking a Senior CPU Design Methodology Engineer in Austin, TX to define scalable SOC methodologies and tools for front-end chip implementation. You will work with ASIC, Physical Design, CAD, and software teams to optimize RTL quality and automation. You will...
- ...Renesas, we are more than just a semiconductor company; we are the engine behind a "safer, smarter, and more sustainable" future.... ...and green energy solutions. Job Description Principal Package Design Engineer Location: Hybrid at main Renesas Electronics America...Work at office
$157.3k - $212.8k
...organization within Amazon) designs silicon and software that accelerates... ...a Signal or Power Integrity Engineer to join our hardware team... ...optimization of advanced packaging solutions for next-... ...FFE) or PDN target impedance methodology Interest or experience in package...Local areaFlexible hours- ...every market segment of chip design, including artificial intelligence... ...Design Verification Engineer to lead verification of CPU-subsystem... ...judgment and scalable methodology.ResponsibilitiesLead verification... ..., competitive benefits package which may include healthcare...Full timeImmediate start
- ...DescriptionRenesas is seeking a Senior Digital Design Verification Engineer to join our team developing complex... ...interest in improving verification methodology and productivity. Additional... ...with a competitive benefits package alongside their salary. More information...
$91.15k - $172.86k
...link below.Life at IntelAs a CPU Logic Design Engineer, you will play a critical role in... ...applications.Familiarity with software tools and methodologies used in RTL design, verification, and... ...retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar...Full timeInternshipLocal areaImmediate startShift work$116k - $189.75k
...NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure... ...competitive salaries and a generous benefits package, we are widely considered to be one of the technology...Full time$200k - $300k
...role We're looking for an experienced Design Verification engineer with at least 5 years of pre-silicon... ...perspectives Well-versed in UVM methodology and testbench architecture... ...accommodations on request. Full compensation packages are based on candidate experience...H1bVisa sponsorshipWork visaFlexible hoursNight shift$196k - $310.5k
...now looking for a Senior ASIC Floorplan Design Engineer!NVIDIA is seeking a talented ASIC... ...design leads, physical design leads and package leads, you will develop and to craft and... ...with CAD and physical design methodologies (flow and tool development), chip floorplan...Full time$147.4k - $272.1k
...& mixed signal verification engineers? We are looking for engineers... ...verification of mixed signal IC designs using a combination of analog... ...-out. Develop verification methodology suitable for the IP, ensuring... ...of our total compensation package and is determined within a range...Relocation- ...every market segment of chip design, including artificial intelligence... ...Staff Design Verification Engineer to lead verification of a... ...and test content.Contribute to methodology and infrastructure improvements... ..., competitive benefits package which may include healthcare...Full timeImmediate start
- ...is looking for an experienced engineer to join the PHYMAC MODEM team. The role involves designing and verifying digital components... ...and digital verification methodologies. The ideal candidate will have... ...offers a competitive compensation package along with comprehensive...
$130.1k - $176k
...experts in deep submicron circuit design. This position is a rare... ...: Master's in Electrical Engineering, Computer Engineering, or other... ...improvement You appreciate methodology and efficiency improvements... ...offering. The total reward package will be shared with...Work experience placementWork at officeLocal area- ...team, you will develop and design custom silicon for client, discrete... ...problems with a firm methodology and problem‑solving technique... ...workers, teams, and customer engineering teams. KEY RESPONSIBILITIES... ...distribution, floor planning, and packaging Skills in scripting, data...
$78.75k - $146.25k
...the PHYMAC MODEM team, which designs digital components of... ...present work to the broader engineering team. Minimum Qualifications... ...simulation and verification methodologies and tools. Understanding of... ...component of the total compensation package for employees. Other rewards...Flexible hours$166k - $249k
...Category Engineering Hire Type Employee Job ID 17853 Base Salary... ...machines. We lead in chip design, verification, and IP integration... ...and digital design methodologies. With at least 5 to 10 years... ...a competitive total rewards package. The actual compensation offered...Remote work$143.15k - $265.85k
Staff Digital Design Engineer - SOC Low Power, Clocking & Integration (Austin, TX) Responsibilities... ...experience with low‑power design methodologies, including UPF, power gating,... ...one component of the total compensation package for employees. Other rewards may include...Flexible hoursShift work$168k - $264.5k
...join the team and see how you can make a lasting impact on the world.NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer, PPA Fusion Compiler to join our outstanding Networking Silicon engineering team, developing the industry's best high speed...Full time$168k - $264.5k
...join the team and see how you can make a lasting impact on the world.We are looking for a physical design engineer to be a part of NVIDIA’s physical design (PD) methodology team driving innovation in PD across all of NVIDIA's products - Datacenter AI, HPC, Networking,...Full timeRemote work
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Package Design Methodology Engineer. Be the first to apply!
- semiconductor packaging engineer Austin, TX
- packaging engineer Austin, TX
- entry level design engineer Austin, TX
- industrial design engineer Austin, TX
- product design engineer Austin, TX
- lead product engineer Austin, TX
- product engineering intern Austin, TX
- sr. product engineer Austin, TX
- soc design engineer Austin, TX
- vlsi design engineer Austin, TX


