AI Silicon TPM: Backend/NPI Lead for Data-Center Chips

Majestic Labs is seeking an experienced Silicon Technical Program Manager (TPM) to coordinate backend execution and New Product Introduction for data-center-grade AI chips. You will bridge hardware design, backend implementation, and post-silicon qualification. Lead multi-chip schedules from RTL freeze through physical implementation, tapeout, and high-volume production. Strong communication across backend design, DFT, and product engineering teams is essential. #J-18808-Ljbffr