Sr Digital Physical Design Engineer

Job Description Keysight Technologies is a leader in technology innovation, providing advanced solutions in electronic design, simulation, and testing across various industries including communications, automotive, and aerospace. With a workforce of approximately 16,800 employees, Keysight is committed to fostering a culture of creativity and collaboration, enabling employees to thrive in their careers. The company is currently seeking an experienced Physical Design R&D Engineer to contribute to the development of digital and mixed signal ASICs, a critical component of their product offerings. Responsibilities Lead the physical design and tape release of digital and mixed signal ASICs from RTL to GDS. Solve complex design and development challenges, addressing customer application issues. Engage in full ASIC design activities including definition, architecture, digital logic design, and IP validation. Oversee floor planning, PNR, timing closure, STA, formal verification, low power design, clock distribution, EMIR analysis, and physical verification. Conduct close sign-off checks and interface with industry foundries for GDS delivery. Collaborate with cross-functional teams to align architecture with physical design constraints. Develop tool flows and coordinate with vendors to meet project milestones. Qualifications Bachelor's or Master's degree in Electrical or Computer Engineering. Typically requires 20 years of relevant experience in the field. Extensive knowledge and ability to work independently in ASIC design. Skills Industry tapeout experience and problem-solving skills. Proficiency with Innovus, Tempus, Voltus, and Genus tools. Experience in task automation and scripting. Strong fundamentals in ASIC Design, DSP, and digital architectures/systems. Leadership skills to influence teams and drive productivity. Excellent teamwork and communication skills, both written and verbal. Tell us what you're building and we'll recommend qualified vendors for your project. ASIC Design Services Verification Packaging & Wafer Semiconductor IP Find the Right Semiconductor Partner Tell us what you're building and we'll recommend qualified vendors for your project. ASIC Design Services Verification Packaging & Wafer Semiconductor IP Work Email Free No obligation Response within 24 hours #J-18808-Ljbffr