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Quantum Computing Research Intern: QEC & Co-Design

Riverlane

Riverlane is seeking an engineering intern to explore classical computing architectures for scalable quantum error correction. The role sits at the intersection of quantum error correction, computer architecture, and hardware-software co-design.

You will work with Riverlane researchers in Cambridge, MA, supervised by a dedicated mentor, contributing to understanding how QEC systems meet performance needs of large quantum computers.

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Vacancy posted 2 days ago
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