Hardware Engineer - ELSYS - (Open Rank)

Overview The Georgia Tech Research Institute (GTRI) is the nonprofit, applied research division of the Georgia Institute of Technology (Georgia Tech). Founded in 1934 as the Engineering Experiment Station, GTRI has grown to more than 2,900 employees, supporting eight laboratories in over 20 locations around the country and performing more than $940 million of problem‑solving research annually for government and industry. GTRI's renowned researchers combine science, engineering, economics, policy, and technical expertise to solve complex problems for the U.S. federal government, state, and industry. Georgia Tech's Mission and Values Georgia Tech's mission is to develop leaders who advance technology and improve the human condition. The Institute has nine key values that are foundational to everything we do: Students are our top priority. We strive for excellence. We thrive on diversity. We celebrate collaboration. We champion innovation. We safeguard freedom of inquiry and expression. We nurture the wellbeing of our community. We act ethically. We are responsible stewards. Over the next decade, Georgia Tech will become an example of inclusive innovation, a leading technological research university of unmatched scale, relentlessly committed to serving the public good; breaking new ground in addressing the biggest local, national, and global challenges and opportunities of our time; making technology broadly accessible; and developing exceptional, principled leaders from all backgrounds ready to produce novel ideas and create solutions with real human impact. Project/Unit Description The Applied Embedded Systems (AES) division of the Electronic Systems Laboratory (ELSYS) supports multiple research products and projects in concert with development teams who are building complex, multi‑faceted embedded and electronic systems. AES predominantly focuses on the research, development, testing, and deployment of embedded electronic and electromechanical systems. These systems provide our sponsors with technological solutions in the fields of Electronic Warfare (EW), Radar, command and control, communications, avionics, entertainment, physiological monitoring, and other applications. This research position will support electronic hardware and systems engineering development needs of the Open Systems Development Branch (OSDB). This includes developing hardware from existing open standards such as OpenVPX, developing new open standards, architecture, and related activities. Job Purpose Hardware Engineers develop mixed‑signal design solutions including analog, RF, and digital portions for Electronic Warfare, Radar, Avionics, and Communication Systems. Specific activities include RF and analog development using system, circuit, or board design and simulation tools; development of digital systems (including high‑speed digital buses and FPGAs) via circuit simulation, schematic capture, board layout, and assembly design; bring‑up, test and debug of the resulting hardware utilizing test equipment such as network analyzers and spectrum analyzers; and integration with other system components. Additional activities include analysis of system performance, improvement analysis, test process and procedure design, and collaboration with other engineering teams. Key Responsibilities Perform circuit simulation, schematic capture, and board layout for submodules of a platform design. Generate documentation of hardware design and theory of operation. Perform laboratory testing activities. Integrate modules with other system components. Significant contributions to technical reports and presentations. Begin to take ownership of a small team development, mentoring others. Significant contributions to white papers and competitive proposals. Additional Responsibilities Develop requirements and architecture for RF/Analog systems. Develop RF and Analog hardware at a module level according to requirements, architecture, and design. Generate documentation of hardware design and theory of operation. Perform advanced RF and Analog laboratory testing activities. Integrate RF/Analog modules with other system components. Primary author of technical reports and presentations, and can lead team review of final deliverables. Primary author of pertinent white papers and competitive proposals. Begin to provide technical vision to sponsors. Take ownership of moderate team development, mentoring others. Lead the development and composition of new/updated open architectures and standards. Lead technical meetings with GTRI and sponsor personnel, and support issue tracking and hardware development planning. Lead proposal efforts or new research areas suitable for internal research and development (IR&D) funding. Lead teams of electrical, mechanical, and software/firmware researchers in support of sponsored research efforts. Required Minimum Qualifications Experience with the definition and utilization of open architectures and standards such as OpenVPX, SOSA, HOST, OMS/UCI, Big Iron, AMS GRA, UC2, NIEM, OCI, etc. Experience developing hardware/software/firmware for embedded environments, including but not limited to FPGA designs, analog/digital circuits, or other embedded hardware. Knowledge of computer architectures as it relates to embedded hardware and communications standards (e.g., Ethernet, PCI Express). Familiarity with Model Based Systems Engineering (MBSE) and the utilization of SysML to execute the Systems Engineering 'V'. Preferred Qualifications Active Secret Clearance. Experience architecting/developing mission systems and/or safety‑critical systems. Experience with full system lifecycle development from requirements definition to verification and validation within an MBSE environment. Experience architecting/developing reference architectures with an MBSE environment. Experience architecting/developing containerized software systems. Experience architecting/developing RF and EO/IR sensor systems. Knowledge of avionics protocols and interfaces, including but not limited to ARINC- and VITA-standard protocols, high‑speed serial, discrete signal, MIL‑STD‑1553 and analog interfaces. Travel Requirements Education and Length of Experience Levels 3, 4 This position vacancy is an open‑rank announcement. The final job offer will be dependent on candidate qualifications in alignment with Research Faculty Extension Professional ranks as outlined in section 3.2.1 of the Georgia Tech Faculty Handbook. 5 years of related experience with a Bachelor's degree in Electrical Engineering, Computer Engineering, or related field of study. 3 years of related experience with a Masters' degree in Electrical Engineering, Computer Engineering, or related field of study. 0 years of related experience with a Ph.D. in Electrical Engineering, Computer Engineering, or related field of study. U.S. Citizenship Requirements Due to our research contracts with the U.S. federal government, candidates for this position must be U.S. Citizens. Clearance Type Required Candidates must be able to obtain and maintain an active security clearance. Benefits at GTRI Comprehensive information on currently offered GTRI benefits, including Health & Welfare, Retirement Plans, Tuition Reimbursement, Time Off, and Professional Development, can be found through this link: Equal Employment Opportunity The Georgia Institute of Technology (Georgia Tech) is an Equal Employment Opportunity Employer. The Institute is committed to maintaining a fair and respectful environment for all. To that end, and in accordance with federal and state law, Board of Regents policy, and Institute policy, Georgia Tech provides equal opportunity to all faculty, staff, students, and all other members of the Georgia Tech community, including applicants for admission and/or employment, contractors, volunteers, and participants in institutional programs, activities, and services. Georgia Tech complies with all applicable laws and regulations governing equal opportunity in the workplace and in educational activities. Equal opportunity and decisions based on merit are fundamental values of the University System of Georgia (USG) and Georgia Tech. Georgia Tech prohibits discrimination, including discriminatory harassment, on the basis of an individual's race, ethnicity, ancestry, color, religion, sex (including pregnancy), national origin, age, disability, genetics, or veteran status in its programs, activities, employment, and admissions. Further, Georgia Tech prohibits citizenship status, immigration status, and national origin discrimination in hiring, firing, and recruitment, except where such restrictions are required in order to comply with law, regulation, executive order, or Attorney General directive, or where they are required by Federal, State, or local government contract. USG Core Values Statement The University System of Georgia is comprised of our 26 institutions of higher education and learning as well as the System Office. Our USG Statement of Core Values are Integrity, Excellence, Accountability, and Respect. These values serve as the foundation for all that we do as an organization, and each USG community member is responsible for demonstrating and upholding these standards. More details on the USG Statement of Core Values and Code of Conduct are available in USG Board Policy 8.2.18.1.2 and can be found online at Additionally, USG supports Freedom of Expression as stated in Board Policy 6.5 Freedom of Expression and Academic Freedom found online at #J-18808-Ljbffr Georgia Tech Research Institute (GTRI)