Senior PMIC Design Engineer for Power Management ICs
Qualcomm
Qualcomm Technologies, Inc. is seeking a senior PMIC design engineer in Santa Clara, CA to lead architecture, design, verification, and documentation of mixed-signal PMIC blocks for compute, data center, automotive, and industrial applications. You will work with Cadence, SPICE, MATLAB and Verilog/VHDL, guide layout, drive silicon bring-up, characterization, and qualification, and mentor peers while aligning with product and validation teams. #J-18808-Ljbffr Qualcomm
Vacancy posted more than 2 months ago
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Senior PMIC Design Engineer for Power Management ICs. Be the first to apply!
Related searches
- semiconductor product engineer Santa Clara, CA
- data center design engineer Santa Clara, CA
- soc design verification engineer Santa Clara, CA
- asic digital design engineer Santa Clara, CA
- soc design engineer Santa Clara, CA
- manufacturing design engineer Santa Clara, CA
- director of product engineering Santa Clara, CA
- senior design verification engineer Santa Clara, CA
- senior asic design engineer Santa Clara, CA
- vlsi design engineer Santa Clara, CA