Senior Principal CPU Microarchitecture Lead (Austin)

Jobtailor in Austin seeks a senior CPU architect to drive a major block from exploration to RTL definition. You will own the specification, implementation, and convergence against performance, timing, power, and schedule targets.

Collaborate with performance modeling, verification, and DFT teams to deliver robust designs, leveraging Verilog/SystemVerilog or VHDL and industry simulators.