Sr. Staff Software/Firmware Engineer - MCU development

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your ImpactMarvell Central Engineering (CE) develops Marvell most advanced High-Speed SerDes (HSS) IPs covering multiple applications, Switch, Automotive, Storage, Optics, etc. Acting as the engine to the company, Central Engineering provides the source of power to every business unit in Marvell system. Central System Engineering (CSE) in Central Engineering, independent of other CE functions including DSP algorithm development, circuit design, physical design, packaging, etc., is a function team responsible of validating all Marvell HSS IPs in the lab environment and supporting all Marvell business units for fast and smooth SoC production.What You Can ExpectRISC-V MCU / SoC Integration OwnershipLead integration of an embedded RISC-V core (e.g., SiFive E24 Core) into chip validation environmentsDefine MCU subsystem architecture: memory map, boot flow, and execution environmentIntegrate and validate system interconnect (AHB/AXI-lite) and memory hierarchy (ROM/SRAM)Implement interrupt architecture using PLIC and CLINTFirmware Development for PHY ValidationDevelop bare-metal and RTOS-based firmware for PHY/IP control and bring-upImplement calibration, training, and tuning algorithms for high-speed interfacesBuild reusable firmware frameworks for:Register-level control abstractionTest sequencing and automationLogging, diagnostics, and error handlingSystem-Level Bring-Up & DebugLead silicon and pre-silicon bring-up using embedded firmwareDebug cross-domain issues across hardware, firmware, and PHY behaviorEnable rapid iteration of initialization, configuration, and recovery flowsDrive root-cause analysis for system-level failuresValidation Automation & Framework IntegrationIntegrate RISC-V firmware into existing PHY validation automation frameworkEnable unified validation across simulation, emulation/FPGA, and siliconDevelop firmware-driven test scenarios replacing or complementing external stimulusBuild infrastructure for automated test execution and result collectionValidation Strategy & Coverage ExpansionTransition validation methodology from directed external tests to software-driven closed-loop validationDefine and implement coverage for:Functional PHY behaviorCorner cases and stress conditionsRecovery and error handling scenariosEnsure reusability of validation content across programs and platformsCross-Functional CollaborationPartner with RTL teams on SoC integration and interface definitionsWork with validation teams to align firmware-driven test strategiesCollaborate with architecture teams to define scalable validation platform directionSupport system-level debug across hardware/software boundariesInfrastructure & Toolchain OwnershipMaintain RISC-V toolchain environment (GCC, linker scripts, startup code)Support debug infrastructure (JTAG, OpenOCD, GDB workflows)Drive automation for firmware build, deployment, and regression executionWhat We're Looking ForMust Have8+ years of experience in embedded systems, firmware, or SoC developmentStrong proficiency in C/C++ with bare-metal programmingExperience with low-level system development:Boot flows, startup code, linker scriptsMemory-mapped I/O and register-level programmingInterrupt handling and real-time constraintsHands-on experience debugging HW/SW integration issues (silicon, FPGA, or RTL simulation)Solid understanding of computer architecture fundamentals (CPU, memory hierarchy, buses)Nice to HaveExperience with RISC-V systems or similar MCU architectures (e.g., ARM Cortex-M)Exposure to embedded SoC integration (bus fabrics such as AHB/AXI-lite)Familiarity with interrupt systems such as PLIC and CLINTExperience with PHY / SerDes / high-speed IP bring-up or validationRTOS experience (e.g., FreeRTOS, Zephyr)Exposure to silicon bring-up or post-silicon validationStrong Plus (Differentiators)Experience building firmware-driven validation frameworks or automation infrastructureFamiliarity with simulation/emulation workflows (RTL co-sim, FPGA prototyping)Experience in closed-loop control systems (calibration, tuning, adaptive algorithms)Exposure to hardware verification or validation environments (UVM, testbenches)Core Skills for Success in This RoleAbility to bridge hardware, firmware, and validation domainsStrong system-level debugging mindset across HW/SW boundariesAbility to design scalable, reusable validation approaches (not just point tests)Experience working in cross-functional teams (RTL, validation, architecture)Expected Base Pay Range (USD)131,010 - 196,300, $ per annumThe successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at View email address on click.appcast.io Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.#LI-JT2SummaryLocation: Santa Clara, CAType: Full time