Principal SoC IP & Interconnect Architect

Description Invent the future with us. Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications. Join us at Ampere and work alongside a passionate and growing team — we’d love to have you apply! About The Role As a Principal SoC IP & Interconnect Architect, you will apply deep technical expertise and architectural leadership to define and integrate advanced SoC and interconnect IP for next-generation Ampere products. This critical role drives the architecture of high-performance I/O and interconnect subsystems, navigating complex system-level requirements and integration tradeoffs. What You'll Achieve Lead the definition, architecture, and integration of SoC and interconnect IP for next-gen Ampere products. Own the end-to-end architecture of one or more I/O and interconnect subsystems, balancing performance, scalability, power, reliability, and platform requirements. Drive cross-functional alignment with system architects, design, verification, and software teams to deliver cohesive, production-ready SoC IP solutions. Outline subsystem interfaces, integration strategies, and architectural requirements to ensure seamless connectivity across the SoC platform. Define subsystem-level SoC architecture in collaboration with CPU and compute-engine teams, aligning with the SoC chassis, global architecture, and integration requirements. Influence key technical decisions and resolve complex architecture and integration tradeoffs throughout the product development lifecycle. About You 6+ years of proven SoC architecture or design experience. Familiar with SoC interconnect and coherent fabric architecture. Deep understanding of AMBA-based interconnect protocols (AXI and CHI), and their application in high-performance, cache-coherent SoC designs. Knowledge of cache-coherent memory systems, DMA traffic, and interconnect performance tradeoffs. Hands-on experience developing architectural performance models for bandwidth, latency, scalability, and workload analysis. Experience across the full IP lifecycle, from IP selection and integration through silicon validation, performance debug, and bring-up. Additional skills highly desired: Previous RTL/Logic Design or Design Verification Experience; IP Integration: Boot / Reset Flows, Performance Modeling; Power Delivery; Power Management; Clocking; Debug/Trace; Interrupts; RAS Education BS degree in Electrical Engineering, Computer Engineering, or Computer Science & 8 years of related experience, MS degree & 6 years, or PhD & 3 years. What We'll Offer At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, cash long-term incentive, and comprehensive benefits. The full base pay range for this role is between $182,000 and $273,000, except in the San Francisco Bay Area where the range is between $195,000 and $292,000. Our benefits include health, wellness, and financial programs that support employees through every stage of life. Benefits Highlights Include Premium medical insurance, dental insurance, vision insurance, as well as income protection and a 401K retirement plan, so that you can feel secure in your health and financial future. Unlimited Flextime and 10+ paid holidays so that you can embrace a healthy work-life balance. A variety of healthy snacks, energizing espresso, and refreshing drinks to keep you fueled and focused throughout the day. And there are much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are excited to share more about our career opportunities with you through the interview process. Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law. #J-18808-Ljbffr