Senior CAD Engineer
$90 - $100 per hourSaige Partners
Job Description We strive to be Your Future, Your Solution to accelerate your career!
Contact Hannah Wilson at View email address on click.appcast.io, you can also schedule an appointment at to learn more about this opportunity! Position: Senior CAD Engineer (San Jose, CA) Job Overview:
We are seeking a Senior IC EDA/CAD Engineer to own and advance our EDA design flows, IT infrastructure, and signoff methodologies. This individual will serve as the technical authority for the EDA environment, driving the setup, qualification, and maintenance of advanced FinFET process technologies while supporting analog, mixed-signal, RF, high-speed I/O, and digital SoC development. The ideal candidate will play a critical role in enabling first-time-right silicon through the deployment and support of industry-standard backend verification and signoff flows. This is a W2 contract position and is not eligible for C2C or W2 referral candidates. Key Responsibilities:
EDA Environment & PDK Management
• Install, qualify, and maintain advanced foundry PDKs for leading-edge FinFET technologies (2nm, 3nm, and 5nm nodes).
• Manage and optimize EDA infrastructure, including compute clusters, grid utilization, and software license management.
• Ensure a stable, scalable, and efficient design environment across engineering teams.
Analog, Mixed-Signal & Digital Design Flow Development
• Develop, deploy, and support end-to-end Cadence design flows, including Virtuoso and Innovus environments.
• Optimize design methodologies for RF, analog, mixed-signal, and high-speed I/O applications.
• Standardize design processes to improve productivity and design quality.
Physical Verification & Signoff
• Create, automate, and maintain chip-level and IP-level signoff flows.
• Support physical verification using Siemens Calibre for DRC, LVS, and PERC verification.
• Manage parasitic extraction methodologies using Synopsys StarRC to ensure signoff accuracy.
Reliability Verification
• Deploy and support advanced reliability verification methodologies, including:
o Electro-Migration and IR-Drop (EMIR) analysis
o Programmable Electrical Rule Checking (PERC)
• Ensure reliability and manufacturability requirements are met for advanced process technologies.
Automation & Technical Support
• Develop scripts, utilities, and automation frameworks to streamline workflows and eliminate manual processes.
• Standardize EDA flows across projects and improve tool interoperability.
• Serve as the primary technical interface with EDA vendors, driving issue resolution and roadmap alignment.
Qualifications:
Required
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 5+ years of hands-on IC CAD/EDA engineering experience.
• Direct experience supporting advanced FinFET technologies (5nm, 3nm, or 2nm nodes).
• Deep expertise with:
o Siemens Calibre (DRC, LVS, PERC)
o Synopsys StarRC
o Cadence Virtuoso and Innovus
• Strong scripting and automation skills using:
o SKILL
o Perl
o Python
o Tcl
o Bash/Shell
• Strong Linux administration and troubleshooting skills.
• Experience managing compute clusters and grid environments (LSF, SGE, or similar).
• Experience with version control and design data management tools such as Perforce or ICManage.
Preferred
• Knowledge of advanced-node design challenges, including:
o Multi-patterning
o Dummy fill effects
o Layout-dependent effects (LDE)
o Design for Manufacturability (DFM) signoff
• Background in custom layout or circuit design.
• Experience working directly with foundries on:
o Design rule waiver requests
o PDK issue reporting
o Process qualification activities
• Strong analytical, troubleshooting, and problem-solving abilities.
• Excellent communication and collaboration skills with cross-functional engineering teams.
Learn more about Saige Partners on Facebook or LinkedIn.
Hours you will be work as a Senior CAD Engineer: Monday through Friday; 8 am - 5 pm CST Compensation you will receive as a Sr. Staff CAD Engineer: $90-$100 per hour Saige Partners, one of the fastest growing technology and talent companies in the Midwest, believes in people with a passion to help them succeed. We are in the business of helping professionals Build Careers, Not Jobs. Saige Partners believes employees are the most valuable asset to building a thriving and successful company culture, which is why we offer a benefit package and convenient weekly payment solutions that helps our employees stay healthy and maintain a positive work/life balance. Contact us to learn more about the opportunity below or check out other opportunities at
Meet Your Recruiter Hannah Wilson
Contact Hannah Wilson at View email address on click.appcast.io, you can also schedule an appointment at to learn more about this opportunity! Position: Senior CAD Engineer (San Jose, CA) Job Overview:
We are seeking a Senior IC EDA/CAD Engineer to own and advance our EDA design flows, IT infrastructure, and signoff methodologies. This individual will serve as the technical authority for the EDA environment, driving the setup, qualification, and maintenance of advanced FinFET process technologies while supporting analog, mixed-signal, RF, high-speed I/O, and digital SoC development. The ideal candidate will play a critical role in enabling first-time-right silicon through the deployment and support of industry-standard backend verification and signoff flows. This is a W2 contract position and is not eligible for C2C or W2 referral candidates. Key Responsibilities:
EDA Environment & PDK Management
• Install, qualify, and maintain advanced foundry PDKs for leading-edge FinFET technologies (2nm, 3nm, and 5nm nodes).
• Manage and optimize EDA infrastructure, including compute clusters, grid utilization, and software license management.
• Ensure a stable, scalable, and efficient design environment across engineering teams.
Analog, Mixed-Signal & Digital Design Flow Development
• Develop, deploy, and support end-to-end Cadence design flows, including Virtuoso and Innovus environments.
• Optimize design methodologies for RF, analog, mixed-signal, and high-speed I/O applications.
• Standardize design processes to improve productivity and design quality.
Physical Verification & Signoff
• Create, automate, and maintain chip-level and IP-level signoff flows.
• Support physical verification using Siemens Calibre for DRC, LVS, and PERC verification.
• Manage parasitic extraction methodologies using Synopsys StarRC to ensure signoff accuracy.
Reliability Verification
• Deploy and support advanced reliability verification methodologies, including:
o Electro-Migration and IR-Drop (EMIR) analysis
o Programmable Electrical Rule Checking (PERC)
• Ensure reliability and manufacturability requirements are met for advanced process technologies.
Automation & Technical Support
• Develop scripts, utilities, and automation frameworks to streamline workflows and eliminate manual processes.
• Standardize EDA flows across projects and improve tool interoperability.
• Serve as the primary technical interface with EDA vendors, driving issue resolution and roadmap alignment.
Qualifications:
Required
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 5+ years of hands-on IC CAD/EDA engineering experience.
• Direct experience supporting advanced FinFET technologies (5nm, 3nm, or 2nm nodes).
• Deep expertise with:
o Siemens Calibre (DRC, LVS, PERC)
o Synopsys StarRC
o Cadence Virtuoso and Innovus
• Strong scripting and automation skills using:
o SKILL
o Perl
o Python
o Tcl
o Bash/Shell
• Strong Linux administration and troubleshooting skills.
• Experience managing compute clusters and grid environments (LSF, SGE, or similar).
• Experience with version control and design data management tools such as Perforce or ICManage.
Preferred
• Knowledge of advanced-node design challenges, including:
o Multi-patterning
o Dummy fill effects
o Layout-dependent effects (LDE)
o Design for Manufacturability (DFM) signoff
• Background in custom layout or circuit design.
• Experience working directly with foundries on:
o Design rule waiver requests
o PDK issue reporting
o Process qualification activities
• Strong analytical, troubleshooting, and problem-solving abilities.
• Excellent communication and collaboration skills with cross-functional engineering teams.
Learn more about Saige Partners on Facebook or LinkedIn.
Hours you will be work as a Senior CAD Engineer: Monday through Friday; 8 am - 5 pm CST Compensation you will receive as a Sr. Staff CAD Engineer: $90-$100 per hour Saige Partners, one of the fastest growing technology and talent companies in the Midwest, believes in people with a passion to help them succeed. We are in the business of helping professionals Build Careers, Not Jobs. Saige Partners believes employees are the most valuable asset to building a thriving and successful company culture, which is why we offer a benefit package and convenient weekly payment solutions that helps our employees stay healthy and maintain a positive work/life balance. Contact us to learn more about the opportunity below or check out other opportunities at
Meet Your Recruiter Hannah Wilson
Vacancy posted 1 day ago
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